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參數(shù)資料
| 型號(hào)： | ADAU1761BCPZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 25/92頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SIGMADSP CODEC PLL 32LFCSP |
| 設(shè)計(jì)資源： | Stereo Digital Microphone Input Using ADAU1761 and ADMP421 (CN0078) |
| 標(biāo)準(zhǔn)包裝： | 5,000 |
| 系列： | SigmaDSP® |
| 類型： | 音頻編解碼器 |
| 數(shù)據(jù)接口： | 串行 |
| 分辨率（位）： | 24 b |
| ADC / DAC 數(shù)量： | 2 / 2 |
| 三角積分調(diào)變： | 是 |
| 電壓 - 電源，模擬： | 1.8 V ~ 3.65 V |
| 電壓 - 電源，數(shù)字： | 1.63V ~ 3.65V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ |
| 包裝： | 帶卷 (TR) |
| 配用： | EVAL-ADAU1761Z-ND - BOARD EVAL FOR ADAU1761 |
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ADAU1761
Rev. C | Page 31 of 92
Digital Microphone Input
Microphone Bias
When using a digital microphone connected to the JACKDET/
MICIN pin, the JDFUNC[1:0] bits in Register R2 (Address 0x4008)
must be set to 10 to enable the microphone input and disable the
jack detection function. The ADAU1761 must operate in master
mode and source BCLK to the input clock of the digital micro-
phone. The DSPRUN bit must also be asserted in Register R62
(DSP run register, Address 0x40F6) for digital microphone
operation.
The MICBIAS pin provides a voltage reference for electret analog
microphones. The MICBIAS voltage is set in Register R10
(record microphone bias control register, Address 0x4010). In
this register, the MICBIAS output can be enabled or disabled.
Additional options include high performance operation and a
gain boost. The gain boost provides two different voltage biases:
0.65 × AVDD or 0.90 × AVDD. When enabled, the high perfor-
mance bit increases supply current to the microphone bias
circuit to decrease rms input noise.
The digital microphone signal bypasses record path mixers and
ADCs and is routed directly into the decimation filters. The
digital microphone and ADCs share decimation filters and,
therefore, both cannot be used simultaneously. The digital
microphone input select bit, INSEL, can be set in Register R19
(ADC control register, Address 0x4019). Figure 36 depicts the
digital microphone interface and signal routing.
The MICBIAS pin can also be used to cleanly supply voltage
to digital microphones or analog microphones with separate
power supply pins.
ANALOG-TO-DIGITAL CONVERTERS
The ADAU1761 uses two 24-bit Σ-Δ analog-to-digital con-
verters (ADCs) with selectable oversampling ratios of 64× or
128× (selected by Bit 3 in Register R17, Address 0x4017).
JDFUNC[1:0]
DIGITAL MICROPHONE
INTERFACE
LEFT
CHANNEL
RIGHT
CHANNEL
TO JACK
DETECTION
CIRCUIT
JACKDET/MICIN
RIGHT
ADC
LEFT
ADC
DECIMATORS
R19: ADC CONTROL
INSEL
R2: DIGITAL MICROPHONE/
JACK DETECTION
CONTROL
0
768
0-
0
23
ADC Full-Scale Level
The full-scale input to the ADCs (0 dBFS) depends on AVDD.
At AVDD = 3.3 V, the full-scale input level is 1.0 V rms. This
full-scale analog input will output a digital signal at 1.38 dBFS.
This gain offset is built into the ADAU1761 to prevent clipping.
The full-scale input level scales linearly with the level of AVDD.
For single-ended and pseudo-differential signals, the full-scale
value corresponds to the signal level at the pins, 0 dBFS.
The full differential full-scale input level is measured after the
differential amplifier, which corresponds to 6 dBFS at each pin.
Signal levels above the full-scale value cause the ADCs to clip.
Digital ADC Volume Control
The digital ADC volume can be attenuated before DSP pro-
cessing using Register R20 (left input digital volume register,
Address 0x401A) and Register R21 (right input digital volume
register, Address 0x401B).
Figure 36. Digital Microphone Interface Block Diagram
High-Pass Filter
By default, a high-pass filter is used in the ADC path to remove
dc offsets; this filter can be enabled or disabled in Register R19
(ADC control register, Address 0x4019). At fS = 48 kHz, the
corner frequency of this high-pass filter is 2 Hz.
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| ADAU1772BCPZ | 功能描述:接口—CODEC Low Latency Noise and Power CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| ADAU1772BCPZ-R7 | 功能描述:接口—CODEC Low Latency Noise and Power CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| ADAU1772BCPZ-RL | 功能描述:接口—CODEC Low Latency Noise and Power CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| ADAU1777BCBZRL | 功能描述:LOW LATENCY NOISE AND POWER CODE 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態(tài):在售 類型:音頻 數(shù)據(jù)接口:I2C，SPI? 分辨率（位）:24 b ADC/DAC 數(shù):4 / 2 三角積分:無 信噪比，ADC/DAC（db）（典型值）:102 / 108 動(dòng)態(tài)范圍，ADC/DAC（db）（典型值）:- 電壓 - 電源，模擬:1.71 V ~ 3.63 V 電壓 - 電源，數(shù)字:1.045 V ~ 1.98 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:36-WFBGA，WLCSP 供應(yīng)商器件封裝:36-WLCSP（3.77x3.20） 標(biāo)準(zhǔn)包裝:5,000 |
| ADAU1781 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Noise Stereo Codec with SigmaDSP Processing Core |
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