參數(shù)資料
型號: ADAV803ASTZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 28/60頁
文件大?。?/td> 0K
描述: IC CODEC AUDIO R-DVD 3.3V 64LQFP
標(biāo)準(zhǔn)包裝: 1,500
類型: 音頻編解碼器
數(shù)據(jù)接口: 串行
分辨率(位): 24 b
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
動態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db): 102 / 101
電壓 - 電源,模擬: 3 V ~ 3.6 V
電壓 - 電源,數(shù)字: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
包裝: 帶卷 (TR)
配用: EVAL-ADAV803EBZ-ND - BOARD EVALUATION FOR ADAV803
ADAV803
Rev. A | Page 34 of 60
Record Port Control—Address 0000110 (0x06)
Table 25. Record Port Control Register Bit Map
7
6
5
4
3
2
1
0
Reserved
CLKSRC1
CLKSRC0
WLEN1
WLEN0
SPMODE1
SPMODE0
Table 26. Record Port Control Register Bit Descriptions
Bit Name
Description
CLKSRC[1:0]
Selects the clock source for generating the OLRCLK and OBCLK.
00 = Record port is a slave.
01 = Recovered PLL clock.
10 = Internal Clock 1.
11 = Internal Clock 2.
WLEN[1:0]
Selects the serial output word length.
00 = 24 bits.
01 = 20 bits.
10 = 18 bits.
11 = 16 bits.
SPMODE[1:0]
Selects the serial format of the record port.
00 = Left-justified.
01 = I2S.
10 = Reserved.
11 = Right-justified.
Auxiliary Output Port—Address 0000111 (0x07)
Table 27. Auxiliary Output Port Register Bit Map
7
6
5
4
3
2
1
0
Reserved
CLKSRC1
CLKSRC0
WLEN1
WLEN0
SPMODE1
SPMODE0
Table 28. Auxiliary Output Port Register Bit Descriptions
Bit Name
Description
CLKSRC[1:0]
Selects the clock source for generating the OAUXLRCLK and OAUXBCLK.
00 = Auxiliary record port is a slave.
01 = Recovered PLL clock.
10 = Internal Clock 1.
11 = Internal Clock 2.
WLEN[1:0]
Selects the serial output word length.
00 = 24 bits.
01 = 20 bits.
10 = 18 bits.
11 = 16 bits.
SPMODE[1:0]
Selects the serial format of the auxiliary record port.
00 = Left-justified.
01 = I2S.
10 = Reserved.
11 = Right-justified.
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