參數(shù)資料
型號: ADSP-BF548BBCZ-5A
廠商: Analog Devices Inc
文件頁數(shù): 25/100頁
文件大?。?/td> 0K
描述: IC DSP 16BIT 533MHZ 400CSBGA
產(chǎn)品培訓(xùn)模塊: Blackfin® Processor Core Architecture Overview
Blackfin® Device Drivers
Blackfin® Optimizations for Performance and Power Consumption
Blackfin® System Services
標準包裝: 1
系列: Blackfin®
類型: 定點
接口: CAN,SPI,SSP,TWI,UART,USB
時鐘速率: 533MHz
非易失內(nèi)存: 外部
芯片上RAM: 260kB
電壓 - 輸入/輸出: 2.50V,3.30V
電壓 - 核心: 1.25V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 400-LFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 400-CSPBGA(17x17)
包裝: 托盤
配用: ADSP-3PARCBF548M01-ND - MODULE BOARD BF548
ADSP-3PARCBF548E02-ND - KIT DEV STARTER BF548
ADZS-BF548-EZLITE-ND - KIT EZLITE ADZS-BF548
Rev. C
|
Page 30 of 100
|
February 2010
ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
Port H:
GPIO/ AMC/EXTDMA/ UART1 /PPI0–2 /ATAPI/Up-
Down Counter/TMR8-10/Host DMA/MXVR (MOST)
PH0/ UART1TX/ PPI1_FS3_DEN
I/O GPIO/UART1 Transmit/ PPI1 Frame Sync 3A
PH1/ UART1RX/PPI0_FS3_DEN/ TACI1
I/O GPIO/UART 1 Receive/ PPI0 Frame Sync 3/Alternate Capture Input 1
A
PH2/ ATAPI_RESET /TMR8 /PPI2_FS3_DEN
I/O GPIO/ATAPI Interface Hard Reset Signal /Timer 8/ PPI2 Frame Sync 3A
PH3/ HOST_ADDR /TMR9 /CDG
I/O GPIO/HOST Address / Timer 9 /Count Down and Gate
A
PH4/ HOST_ACK /TMR10 /CUD
I/O GPIO/HOST Acknowledge/Timer 10/ Count Up and Direction
A
PH5/ MTX /DMAR0 /TACI8 and TACLK8
I/O GPIO/MXVR Transmit Data / Ext. DMA Request /Alt Capt. In. 8 /Alt In. Clk 8 C
PH6/ MRX /DMAR1 /TACI9 and TACLK9
I/O GPIO/MXVR Receive Data /Ext. DMA Request /Alt Capt. In. 9 /Alt In. Clk 9
A
PH7/MRXON/GPW/TACI10 and TACLK10/ HWAITA
4,5
I/O GPIO/MXVR Receive Phy On /Alt Capt. In. 10 /Alt In. Clk 10/ Alternate Boot
Host Wait
A
PH8/ A4
6
I/O GPIO/Address Bus for Async Access
A
PH9/ A5
I/O GPIO/Address Bus for Async Access
A
PH10 /A66
I/O GPIO/Address Bus for Async Access
A
PH11 /A7
I/O GPIO/Address Bus for Async Access
A
PH12 /A8
I/O GPIO/Address Bus for Async Access
A
PH13 /A96
I/O GPIO/Address Bus for Async Access
A
Port I: GPIO/AMC
PI0 /A10
I/O GPIO/Address Bus for Async Access
A
PI1 /A116
I/O GPIO/Address Bus for Async Access
A
PI2 /A12
I/O GPIO/Address Bus for Async Access
A
PI3 /A13
I/O GPIO/Address Bus for Async Access
A
PI4 /A146
I/O GPIO/Address Bus for Async Access
A
PI5 /A156
I/O GPIO/Address Bus for Async Access
A
PI6 /A16
I/O GPIO/Address Bus for Async Access
A
PI7 /A176
I/O GPIO/Address Bus for Async Access
A
PI8 /A186
I/O GPIO/Address Bus for Async Access
A
PI9 /A19
I/O GPIO/Address Bus for Async Access
A
PI10 /A206
I/O GPIO/Address Bus for Async Access
A
PI11 /A216
I/O GPIO/Address Bus for Async Access
A
PI12 /A22
I/O GPIO/Address Bus for Async Access
A
PI13 /A236
I/O GPIO/Address Bus for Async Access
A
PI14 /A246
I/O GPIO/Address Bus for Async Access
A
PI15 /A25/NR_CLK
I/O GPIO/Address Bus for Async Access/ NOR clock
A
Table 12. Pin Descriptions (Continued)
Pin Name
I/O1 Function (First / Second/Third/Fourth)
Driver
Type2
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