參數(shù)資料
型號(hào): AM79C961AKC
廠商: ADVANCED MICRO DEVICES INC
元件分類: 微控制器/微處理器
英文描述: PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
中文描述: 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP13
封裝: CARRIER RING, PLASTIC, QFP-132
文件頁(yè)數(shù): 71/85頁(yè)
文件大?。?/td> 1088K
代理商: AM79C961AKC
Am79C961A
71
P R E L I M I N A R Y
MENDEC logic. The LA (unlatched address) pins are
removed and become the GPSI signals, therefore, only
20 bits of address space is available. The table below
shows the GPSI pin configuration:
To invoke the GPSI signals, follow the procedure below:
1. After reset or I/O read of Reset Address, write 10b
to PORTSEL bits in CSR15.
2. Set the ENTST bit in CSR4
3. Set the GPSIEN bit in CSR124 (see note below)
(The pins LA17–LA23 will change function after the
completion of the above three steps.)
4. Clear the ENTST bit in CSR4
5. Clear Media Select bits in ISACSR2
6. Define the PORTSEL bits in the MODE register
(CSR15) to be 10b to define GPSI port. The MODE
register image is in the initialization block.
Note:
LA pins will be tristated before writing to GPSIEN bit.
After writing to GPSIEN, LA[17–21] will be inputs, LA[22–23]
will be outputs.
GPSI Pin Configurations
Note:
The GPSI Function is available only in the Bus Master Mode of operation.
GPSI Function
Receive Data
Receive Clock
Receive Carrier Sense
Collision
Transmit Clock
Transmit Enable
Transmit Data
GPSI
I/O Type
I
I
I
I
I
O
O
LANCE
GPSI Pin
RX
RCLK
RENA
CLSN
TCLK
TENA
TX
PCnet-ISA II
GPSI Pin
RXDAT
SRDCLK
RXCRS
CLSN
STDCLK
TXEN
TXDAT
PCnet-ISA II
Pin Number
5
6
7
9
10
11
12
PCnet-ISA II Normal
Pin Function
LA17
LA18
LA19
LA20
LA21
LA22
LA23
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