參數(shù)資料
型號(hào)： AM79C972BVCW
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
中文描述： 5 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP176
封裝： TQFP-176
文件頁(yè)數(shù)： 102/130頁(yè)
文件大?。?/td> 1580K
代理商： AM79C972BVCW
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102
Am79C972
PCI Expansion ROM Base Address Register
Offset 30h
The PCI Expansion ROM Base Address register is a
32-bit register that defines the base address, size and
address alignment of an Expansion ROM. It is located
at offset 30h in the PCI Configuration Space.
Bit
Name
Description
31-20
ROMBASE Expansion ROM base address
most significant 12 bits. These
bits are written by the host to
specify the location of the Expan-
sion ROM in all of memory space.
ROMBASE must be written with a
valid
address
Am79C972 Expansion ROM ac-
cess is enabled by setting
ROMEN (PCI Expansion ROM
Base Address register, bit 0) and
MEMEN (PCI Command register,
bit 1).
before
the
Since the 12 most significant bits
of the base address are program-
mable, the host can map the Ex-
pansion
ROM
boundary.
on any
1M
When the Am79C972 controller
is enabled for Expansion ROM
access (ROMEN and MEMEN
are set to 1), it monitors the PCI
bus for a valid memory com-
mand. If the value on AD[31:2]
during the address phase of the
cycle falls between ROMBASE
and ROMBASE + 1M - 4, the
Am79C972 controller will drive
DEVSEL indicating it will respond
to the access.
ROMBASE is read and written by
the host. ROMBASE is cleared
by H_RESET and is not affected
by S_RESET or by setting the
STOP bit.
19-1
ROMSIZE
ROM size. Read as zeros; write
operation have no effect. ROM-
SIZE indicates the maximum size
of the Expansion ROM the
Am79C972 controller can sup-
port. The host can determine the
Expansion ROM size by writing
FFFF FFFFh to the Expansion
ROM Base Address register. It
will read back a value of 0 in bit
19-1, indicating an Expansion
ROM size of 1M.
Note that ROMSIZE only speci-
fies the maximum size of Expan-
sion
ROM
the
controller supports. A smaller
ROM can be used, too. The actu-
al size of the code in the Expan-
sion ROM is always determined
by reading the Expansion ROM
header.
Am79C972
0
ROMEN
Expansion ROM Enable. Written
by the host to enable access to
the
Expansion
Am79C972 controller will only re-
spond to accesses to the Expan-
sion ROM when both ROMEN
and MEMEN (PCI Command reg-
ister, bit 1) are set to 1.
ROM.
The
ROMEN is read and written by
the host. ROMEN is cleared by
H_RESET and is not effected by
S_RESET or by setting the STOP
bit.
PCI Capabilities Pointer Register
Offset 34h
Bit
Name
Description
7-0
CAP_PTR
The PCI Capabilities pointer
Register is an 8-bit register that
points to a linked list of capabili-
ties implemented on this device.
This register has a default value
of 40h.
The PCI Capabilities register is
located at offset 34h in the PCI
Configuration Space. It is read
only.
PCI Interrupt Line Register
Offset 3Ch
The PCI Interrupt Line register is an 8-bit register that
is used to communicate the routing of the interrupt.
This register is written by the POST software as it ini-
tializes the Am79C972 controller in the system. The
register is read by the network driver to determine the
interrupt channel which the POST software has as-
signed to the Am79C972 controller. The PCI Interrupt
Line register is not modified by the Am79C972 control-
ler. It has no effect on the operation of the device.
The PCI Interrupt Line register is located at offset 3Ch
in the PCI Configuration Space. It is read and written by
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