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參數(shù)資料
| 型號(hào)： | AM79C972BVCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| 中文描述： | 5 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP176 |
| 封裝： | TQFP-176 |
| 文件頁(yè)數(shù)： | 74/130頁(yè) |
| 文件大?。?/td> | 1580K |
| 代理商： | AM79C972BVCW |
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74
Am79C972
AS_EBOE is driven high for one-half clock,
EBUA_EBA[7:0] are driven with the upper 8 bits of the
Expansion ROM address for one more clock cycle after
AS_EBOE goes low. Next, the Am79C972 controller
starts driving the lower 8 bits of the Expansion ROM
address on EBUA_EBA[7:0].
The time that the Am79C972 controller waits for data to
be valid is programmable. ROMTMG (BCR18, bits 15-
12) defines the time from when the Am79C972 control-
ler drives EBUA_EBA[7:0] with the lower 8 bits of the
Expansion ROM address to when the Am79C972 con-
troller latches in the data on the EBD[7:0] inputs. The
register value specifies the time in number of clock cy-
cles. When ROMTMG is set to nine (the default value),
EBD[7:0] is sampled with the next rising edge of CLK
ten clock cycles after EBUA_EBA[7:0] was driven with
a new address value. The clock edge that is used to
sample the data is also the clock edge that generates
the next Expansion ROM address. All four bytes of Ex-
pansion ROM data are stored in holding registers. One
clock cycle after the last data byte is available, the
Am79C972 controller asserts TRDY.
Figure 39.
Flash Configuration for the Expansion Bus
The access time for the Expansion ROM or the EB-
DATA (BCR30) device (t
ACC
) during read operations
can be calculated by subtracting the clock to output
delay for the EBUA_EBA[7:0] outputs (t
v_A_D
) and by
subtracting the input to clock setup time for the
EBD[7:0] inputs (t
s_D
) from the time defined by
ROMTMG:
t
ACC
= ROMTMG * CLK period *CLK_FAC - (t
v_A_D
) -
(t
s_D
)
The access time for the Expansion ROM or for the EB-
DATA (BCR30) device (t
ACC)
during write operations
can be calculated by subtracting the clock to output
delay for the EBUA EBA[7:0] outputs
(t
v_A_D
) and by
EBUA_EBA[7:0]
EBDA[15:8]
EBD[7:0]
EBWE
AS_/EBOE
A[15:8]
A[7:0]
DQ[7:0]
CS
OE
Am79C972
’
374
D-FF
FLASH
EROMCS
A[23:16]
WE
21485C-42
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| AM79C972 | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BVIW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C974 | PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems |
| AM79C974KCW | PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C972BVD\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C972BVD\W | 制造商:Advanced Micro Devices 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 176-Pin TQFP Tray |
| AM79C972BVIW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C973 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C973/75 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Board Layout Considerations for the Am79C973/75 Network Interface? - (PDF) |
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