參數(shù)資料
型號: C8051F010-TB
廠商: Silicon Laboratories Inc
文件頁數(shù): 164/171頁
文件大小: 0K
描述: BOARD PROTOTYPING W/C8051F010
標(biāo)準(zhǔn)包裝: 1
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
12. EXTERNAL RAM (C8051F005/06/07/15/16/17)
The C8051F005/06/07/15/16/17 MCUs include 2048 bytes of RAM mapped into the external data memory space.
All of these address locations may be accessed using the external move instruction (MOVX) and the data pointer
(DPTR), or using MOVX indirect addressing mode. If the MOVX instruction is used with an 8-bit address operand
(such as @R1), then the high byte of the 16-bit address is provided by the External Memory Interface Control
Register (EMI0CN as shown in Figure 12.1). Note: the MOVX instruction is also used for writes to the Flash
memory. See Section 11 for details. The MOVX instruction accesses XRAM by default (i.e. PSTCL.0 = 0).
For any of the addressing modes the upper 5-bits of the 16-bit external data memory address word are “don’t cares”.
As a result, the 2048-byte RAM is mapped modulo style over the entire 64k external data memory address range.
For example, the XRAM byte at address 0x0000 is also at address 0x0800, 0x1000, 0x1800, 0x2000, etc. This is a
useful feature when doing a linear memory fill, as the address pointer doesn’t have to be reset when reaching the
RAM block boundary.
Figure 12.1. EMI0CN: External Memory Interface Control
R
R/W
Reset Value
-
PGSEL2
PGSEL1
PGSEL0
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
0xAF
Bits 7-3: Not Used – reads 00000b
Bits 2-0: PGSEL[2:0]: XRAM Page Select Bits
The XRAM Page Select Bits provide the high byte of the 16-bit external data memory
address when using an 8-bit MOVX command, effectively selecting a 256-byte page of
RAM. The upper 5-bits are “don’t cares”, so the 2k address blocks are repeated modulo
over the entire 64k external data memory address space.
000: xxxxx000b
001: xxxxx001b
010: xxxxx010b
011: xxxxx011b
100: xxxxx100b
101: xxxxx101b
110: xxxxx110b
111: xxxxx111b
Rev. 1.7
92
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