- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄15867 > C8051F010-TB (Silicon Laboratories Inc)BOARD PROTOTYPING W/C8051F010 PDF資料下載
參數(shù)資料
| 型號(hào)： | C8051F010-TB |
| 廠商： | Silicon Laboratories Inc |
| 文件頁(yè)數(shù)： | 20/171頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD PROTOTYPING W/C8051F010 |
| 標(biāo)準(zhǔn)包裝： | 1 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)當(dāng)前第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
16.2.4. Slave Receiver Mode
Serial data is received on SDA while the serial clock is received on SCL. First, a byte is received that contains an
address and data direction bit. In this case the data direction bit (R/W) will be logic 0 to indicate a “WRITE”
operation. If the received address matches the slave’s assigned address (or a general call address is received) one or
more bytes of serial data are received from the master.
After each byte is received, an acknowledge bit is
transmitted by the slave. The master outputs START and STOP conditions to indicate the beginning and end of the
serial transfer.
16.3.
Arbitration
A master may start a transfer only if the bus is free. The bus is free after a STOP condition or after the SCL and
SDA lines remains high for a specified time. Two or more master devices may attempt to generate a START
condition at the same time. Since the devices that generated the START condition may not be aware that other
masters are contending for the bus, an arbitration scheme is employed. The master devices continue to transmit
until one of the masters transmits a HIGH level, while the other(s) master transmits a LOW level on SDA. The first
master(s) transmitting the HIGH level on SDA looses the arbitration and is required to give up the bus.
16.4.
Clock Low Extension
SMBus provides a clock synchronization mechanism, similar to I2C, which allows devices with different speed
capabilities to coexist on the bus. A clock-low extension is used during a transfer in order to allow slower slave
devices to communicate with faster masters. The slave can hold the SCL line LOW to extend the clock low period,
effectively decreasing the serial clock frequency.
16.5.
Timeouts
16.5.1. SCL Low Timeout
If the SCL line is held low by a slave device on the bus, no further communication is possible. Furthermore, the
master cannot force the SCL line high to correct the error condition. To solve this problem, the SMBus protocol
specifies that devices participating in a transfer must detect any clock cycle held low longer than 25ms as a
“timeout” condition. Devices that have detected the timeout condition must reset the communication no later than
10ms after detecting the timeout condition.
One of the MCU’s general-purpose timers, operating in 16-bit auto-reload mode, can be used to monitor the SCL
line for this timeout condition. Timer 3 is specifically designed for this purpose. (Refer to the Timer 3 Section
19.3. for detailed information on Timer 3 operation.)
16.5.2. SCL High (SMBus Free) Timeout
The SMBus specification stipulates that if a device holds the SCL and SDA lines high for more that 50usec, the bus
is designated as free. The SMB0CR register is used to detect this condition when the FTE bit in SMB0CN is set.
16.6.
SMBus Special Function Registers
The SMBus serial interface is accessed and controlled through five SFRs: SMB0CN Control Register, SMB0CR
Clock Rate Register, SMB0ADR Address Register, SMB0DAT Data Register and SMB0STA Status Register. The
system device may have one or more SMBus serial interfaces implemented. The five special function registers
related to the operation of the SMBus interface are described in the following section.
Rev. 1.7
116
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISC1210ER3R3J | INDUCTOR WW 3.3UH 5% 1210 |
| RP15-4812DF/P-HC | CONV DC/DC 15W 36-75VIN +/-12V |
| ISC1210ER2R7J | INDUCTOR WW 2.7UH 5% 1210 |
| ISC1210ER2R2J | INDUCTOR WW 2.2UH 5% 1210 |
| GSM06DRKF | CONN EDGECARD 12POS DIP .156 SLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| C8051F011 | 功能描述:8位微控制器 -MCU 32KB 10ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| C8051F011-GQ | 功能描述:8位微控制器 -MCU 32KB 10ADC 48P MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| C8051F011-GQR | 功能描述:8位微控制器 -MCU 32KB 10ADC 48Pin MCU Tape and Reel RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| C8051F011R | 功能描述:8位微控制器 -MCU C 10Bit 48Pin RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| C8051F012 | 功能描述:8位微控制器 -MCU 32KB 10ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。