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參數(shù)資料
| 型號(hào)： | CAT28F512 |
| 英文描述： | 512K-Bit CMOS Flash Memory(512K(64K x 8位）位CMOS閃速存儲(chǔ)器) |
| 中文描述： | 為512k位CMOS閃存（為512k（64K的× 8位）位的CMOS閃速存儲(chǔ)器） |
| 文件頁(yè)數(shù)： | 9/14頁(yè) |
| 文件大?。?/td> | 97K |
| 代理商： | CAT28F512 |
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CAT28F512
9
Preliminary
Doc. No. 25042-00 2/98 F-1
ADDRESSES
CE (E)
OE (G)
WE (W)
DATA (I/O)
VCC
VPP
tWC
tWC
tRC
tCS
tCH
tCS
tCH
tCH
tEHQZ
tDF
tGHWL
tWPH
tWHWH2
tWHGL
tWP
tDS
HIGH-Z
DATA IN
= 20H
DATA IN
= A0H
VALID
DATA OUT
tDH
tDS
tWP
tDH
tDS
tWP
tDH
tOLZ
tOE
tOH
tLZ
tCE
tVPEL
VPPH
VPPL
0V
5.0V
VCC POWER-UP
& STANDBY
SETUP ERASE
COMMAND
ERASE
COMMAND
ERASING
ERASE VERIFY
COMMAND
ERASE
VERIFICATION
VCC STANDBY
tAS
tAH
DATA IN
= 20H
tWC
WRITE OPERATIONS
The following operations are initiated by observing the
sequence specified in the Write Command Table.
Read Mode
The device can be put into a standard READ mode by
initiating a write cycle with 00H on the data bus. The
subsequent read cycles will be performed similar to a
standard EPROM or E
2
PROM Read.
Signature Mode
An alternative method for reading device signature (see
Read Operations Signature Mode), is initiated by writing
the code 90H into the command register while keeping
V
PP
high. A read cycle from address 0000H with CE and
OE low (and WE high) will output the device signature.
CATALYST Code = 00110001 (31H)
A Read cycle from address 0001H retrieves the binary
code for the device on outputs I/O
0
to I/O
7
.
28F512 Code = 1011 1000 (B8H)
28F512 F11
Figure 4. A.C. Timing for Erase Operation
Erase Mode
During the first Write cycle, the command 20H is written
into the command register. In order to commence the
erase operation, the identical command of 20H has to be
written again into the register. This two-step process
ensures against accidental erasure of the memory con-
tents. The final erase cycle will be stopped at the rising
edge of WE, at which time the Erase Verify command
(A0H) is sent to the command register. During this cycle,
the address to be verified is sent to the address bus and
latched when WE goes low. An integrated stop timer
allows for automatic timing control over this operation,
eliminating the need for a maximum erase timing speci-
fication. Refer to AC Characteristics (Program/Erase)
for specific timing parameters.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT28F512G12 | 功能描述:閃存 64 X 8 512K 120ns RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問(wèn)時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| CAT28F512G-12 | 制造商:ON Semiconductor 功能描述:Flash Memory IC |
| CAT28F512G-12T | 功能描述:閃存 512K-Bit CMOS 閃存 Memory RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問(wèn)時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| CAT28F512G90 | 功能描述:閃存 64 X 8 512K 90ns RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問(wèn)時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| CAT28F512G-90 | 制造商:ON Semiconductor 功能描述:IC FLASH 512KBIT 90NS LCC-32 |
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