參數(shù)資料
型號: CDB4392
廠商: Cirrus Logic Inc
文件頁數(shù): 11/40頁
文件大小: 0K
描述: EVALUATION BOARD FOR CS4392
標準包裝: 1
DAC 的數(shù)量: 2
位數(shù): 24
采樣率(每秒): 192k
數(shù)據(jù)接口: 串行
DAC 型: 電壓
工作溫度: -10°C ~ 70°C
已供物品:
已用 IC / 零件: CS4392
相關產(chǎn)品: 598-1065-5-ND - IC DAC 24BIT 192KHZ W/VC 20TSSOP
CS4392
DS459PP3
19
DSD Mode - The relationship between the oversampling ratio of the DSD audio data and the required
Master clock to DSD data rate is defined by the Digital interface Format pins. Note that the Functional
Mode registers must be set to DSD Mode. See 9 for register options.
6.1.3
De-Emphasis Control (Bits 3:2)
Function:
Implementation of the standard 15
s/50 s digital de-emphasis filter response, Figure 7, requires re-
configuration of the digital filter to maintain the proper filter response for 32, 44.1 or 48 kHz sample
rates. NOTE: De-emphasis is available only in Single-Speed Mode. See 10 below.
6.1.4
Functional Mode (Bits 1:0)
Function:
Selects the required range of input sample rates or DSD Mode. See Table 11.
DIF2
DIF1
DIFO
DESCRIPTION
0
64x oversampled DSD data with a 4x MCLK to DSD data rate (default)
0
1
64x oversampled DSD data with a 6x MCLK to DSD data rate
0
1
0
64x oversampled DSD data with a 8x MCLK to DSD data rate
0
1
64x oversampled DSD data with a 12x MCLK to DSD data rate
1
0
128x oversampled DSD data with a 2x MCLK to DSD data rate
1
0
1
128x oversampled DSD data with a 3x MCLK to DSD data rate
1
0
128x oversampled DSD data with a 4x MCLK to DSD data rate
1
128x oversampled DSD data with a 6x MCLK to DSD data rate
Table 9. Digital Interface Formats - DSD Mode
DEM1
DEMO
DESCRIPTION
0
Disabled (default)
0
1
44.1 kHz de-emphasis
1
0
48 kHz de-emphasis
1
32 kHz de-emphasis
Table 10. De-Emphasis Mode Selection
Gain
dB
-10dB
0dB
Frequency
T2 = 15 s
T1=50 s
F1
F2
3.183 kHz
10.61 kHz
Figure 10. De-Emphasis Curve
FM1
FM0
MODE
0
Single-Speed Mode: 4 to 50 kHz sample rates
(default)
0
1
Double-Speed Mode: 50 to 100 kHz sample rates
1
0
Quad-Speed Mode: 100 to 200 kHz sample rates
1
Direct Stream Digital Mode
Table 11. Functional Mode Selection
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