Reset (Input) - Powers down device and resets all internal registers to their defaul" />
參數(shù)資料
型號: CDB4392
廠商: Cirrus Logic Inc
文件頁數(shù): 36/40頁
文件大?。?/td> 0K
描述: EVALUATION BOARD FOR CS4392
標(biāo)準(zhǔn)包裝: 1
DAC 的數(shù)量: 2
位數(shù): 24
采樣率(每秒): 192k
數(shù)據(jù)接口: 串行
DAC 型: 電壓
工作溫度: -10°C ~ 70°C
已供物品:
已用 IC / 零件: CS4392
相關(guān)產(chǎn)品: 598-1065-5-ND - IC DAC 24BIT 192KHZ W/VC 20TSSOP
CS4392
DS459PP3
5
1. PIN DESCRIPTION - PCM DATA MODE
RST
1
Reset (Input) - Powers down device and resets all internal registers to their default settings.
VL
2
Logic Power (Input) - Positive power for the digital input/output.
SDATA
3
Serial Audio Data (Input) - Input for two’s complement serial audio data.
SCLK
4
Serial Clock (Input/Output) - Serial clock for the serial audio interface.
LRCK
5
Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the
serial audio data line.
MCLK
6
Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters.
FILT+
11
Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
CMOUT
12
Common Mode Voltage (Output) - Filter connection for internal quiescent voltage.
AMUTEC
BMUTEC
20
13
Mute Control (Output) - The Mute Control pin goes high during power-up initialization, reset, muting,
power-down or if the master clock to left/right clock frequency ratio is incorrect.
AOUTB-
AOUTB+
AOUTA+
AOUTA
14
15
18
19
Differential Analog Output (Outputs) - The full scale differential analog output level is specified in the
Analog Characteristics specification table.
AGND
16
Ground (Input)
VA
17
Analog Power (Input) - Positive power for the analog section.
Control Port Mode Definitions
M3
7
Mode Selection (Input) - This pins should be tied to GND level during control port mode.
SCL/CCLK
8
Serial Control Port Clock (Input) - Serial clock for the serial control port.
SDA/CDIN
9
Serial Control Data (Input/Output) - SDA is a data I/O line in I2C mode. CDIN is the input data line for
the control port interface in SPI mode.
AD0/CS
10
Address Bit 0 (I2C) / Control Port Chip Select (SPI) (Input/Output) - AD0 is a chip address pin in I2C
mode; CS is the chip select signal for SPI format.
Stand-Alone Mode Definitions
M3
M2
M1
M0
7
8
9
10
Mode Selection (Input) - Determines the operational mode of the device.
RST
AMUTEC
VL
AOUTA-
SDATA
AOUTA+
SCLK
VA
LRCK
AGND
MCLK
AOUTB+
M3
AOUTB-
(SCL/CCLK) M2
BMUTEC
(SDA/CDIN) M1
CMOUT
(AD0/CS) M0
FILT+
1
2
3
4
20
19
18
17
5
6
7
8
16
15
14
13
9
10
12
11
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