6.6.2 Soft Volume Ramp-up after Reset (Bit 3) Function: This function allows the user to control whether a sof" />
參數(shù)資料
型號: CDB4392
廠商: Cirrus Logic Inc
文件頁數(shù): 17/40頁
文件大?。?/td> 0K
描述: EVALUATION BOARD FOR CS4392
標準包裝: 1
DAC 的數(shù)量: 2
位數(shù): 24
采樣率(每秒): 192k
數(shù)據(jù)接口: 串行
DAC 型: 電壓
工作溫度: -10°C ~ 70°C
已供物品:
已用 IC / 零件: CS4392
相關(guān)產(chǎn)品: 598-1065-5-ND - IC DAC 24BIT 192KHZ W/VC 20TSSOP
CS4392
24
DS459PP3
6.6.2
Soft Volume Ramp-up after Reset (Bit 3)
Function:
This function allows the user to control whether a soft ramp up in volume is applied when reset is re-
leased either by the reset pin or internal to the chip. The modes are as follows:
0 - An instantaneous change is made from max attenuation to the control port volume setting on re-
lease of reset (default setting).
1 - Volume is ramped up using the soft-ramp settings in Bits 6:5 of register 02h (see 6.2.2) from max
attenuation to the control port volume setting on release of reset.
6.6.3
Soft Ramp-down before Reset (Bit 2)
Function:
This function allows the user to control if a soft ramp-down in volume is applied before a known reset
condition. The modes are as follows:
0 - An instantaneous change is made from the control port volume setting to max attenuation when
chip resets (default setting).
1 - Volume is ramped down using the soft-ramp settings in Bits 6:5 of register 02h (see 6.2.2) from
the control port volume setting to max attenuation when chip resets.
6.7
Chip ID - Register 07h
Function:
This register is Read-Only. Bits 7 through 4 are the part number ID which is 1000b (8h) and the re-
maining Bits (3 through 0) are for the chip revision.
B7
B6
B5
B4
B3
B2
B1
B0
PART3
PART2
PART1
PART0
REV3
REV2
REV1
REV0
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