參數(shù)資料
型號(hào)： CDB8420
廠(chǎng)商： Cirrus Logic Inc
文件頁(yè)數(shù)： 72/94頁(yè)
文件大?。?/td> 0K
描述： EVALUATION BOARD FOR CS8420
標(biāo)準(zhǔn)包裝： 1
主要目的： 音頻，采樣率轉(zhuǎn)換器
嵌入式： 是，MCU，8 位
已用 IC / 零件： CS8420
主要屬性： 帶數(shù)字音頻發(fā)射器和接收器的采樣率轉(zhuǎn)換器
次要屬性： 44.1、48、96 kHz 輸出采樣率，AES/EBU，S/PDIF，EIAJ-340，GUI
已供物品： 板
相關(guān)產(chǎn)品： 598-1125-5-ND - IC SAMPLE RATE CONVERTER 28SOIC
其它名稱(chēng)： 598-1782
74
DS245F4
CS8420
13.7
Hardware Mode 6 Description
(AES3 Transmitter Only)
Hardware Mode 6 data flow is shown in Figure 29. Audio data is input via the serial audio input port and
routed to the AES3 transmitter.
The transmitted channel status, user, and validity data may be input in two alternative methods, determined
by the state of the CEN pin. Mode 6A is selected when the CEN pin is low. In mode 6A, the user data and
validity bit are input via the U and V pins, clocked by both edges of ILRCK. The channel status data is de-
rived from the state of the COPY/C, ORIG, EMPH, and AUDIO pins. Table 15 shows how the COPY/C and
ORIG pins map to channel status bits. In consumer mode, the transmitted category code shall be set to
Sample Rate Converter (0101100b).
Mode 6B is selected when the CEN pin is high. In mode 6B, the channel status, user data and validity bit
are input serially via the COPY/C, U, and V pins. These pins are clocked by both edges of ILRCK (if the port
is in Master mode). Figure 20 shows the timing requirements.
The channel status block pin (TCBL) may be an input or an output, determined by the state of the TCBLD
pin. The serial audio input port data format is selected as shown in Table 15, and may be set to master or
slave by the state of the APMS input pin.
The following pages contain detailed pin descriptions for Hardware mode 6.
AES3
Encoder
&Tx
Serial
Audio
Input
C, U, V Data Buffer
ILRCK
ISCLK
TXP
COPY/C ORIG EMPH AUDIO TCBL
DFC0
DFC1
S/AES
VD+
H/S
Output
Clock
Source
OMCK
Power supply pins (VD+, VA+, DGND, AGND) & the reset pin (RST)
are omitted from this diagram. Please refer to the Typical Connection Diagram for hook-up details.
VD+
SDIN
SFMT1 SFMT0
VD+
FILT
TXN
CEN
U
V
VD+
TCBLD
APMS
Figure 29. Hardware Mode 6 - AES3 Transmitter Only
相關(guān)PDF資料
PDF描述
VI-J11-EX CONVERTER MOD DC/DC 12V 75W
GEM28DTAT CONN EDGECARD 56POS R/A .156 SLD
6278895-7 C/A 62.5/125 RIS SC MTRJ 7M1
A3BBB-2436G IDC CABLE- ASR24B/AE24G/ASR24B
GSM12DTAN CONN EDGECARD 24POS R/A .156 SLD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CDB8421 功能描述:音頻 IC 開(kāi)發(fā)工具 2-Ch 32-Bit 192kHz sample rate converte RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類(lèi)型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
CDB8422 功能描述:界面開(kāi)發(fā)工具 Eval Bd 192kHz SRC S/PDIF Receiver RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類(lèi)型:RS-485 工具用于評(píng)估:ADM3485E 接口類(lèi)型:RS-485 工作電源電壓:3.3 V
CDB8427 功能描述:音頻 IC 開(kāi)發(fā)工具 Eval Bd 96kHz Dig. Audio Transcvr RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類(lèi)型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
CDB8952 制造商:Cirrus Logic 功能描述:NOT RECOMMENDED FOR NEW DESIGNS - USE CDB8952T - Bulk 制造商:Cirrus Logic 功能描述:Tools Development kit Kit Con
CDB8952T 功能描述:以太網(wǎng)開(kāi)發(fā)工具 Eval Bd 100BASE-TX/ 10BASE-T Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類(lèi)型:Ethernet Transceivers 工具用于評(píng)估:KSZ8873RLL 接口類(lèi)型:RMII 工作電源電壓:
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*