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參數(shù)資料
| 型號(hào)： | COP8CBR9HLQ8 |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 90/111頁 |
| 文件大小： | 0K |
| 描述： | IC MCU CMOS 8BIT 44LLP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | COP8™ 8C |
| 核心處理器： | COP8 |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 連通性： | Microwire/Plus（SPI），UART/USART |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 37 |
| 程序存儲(chǔ)器容量： | 32KB（32K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 16x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-WFQFN 裸露焊盤 |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | *COP8CBR9HLQ8 COP8CBR9HLQ8CT |
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SNOS535I – OCTOBER 2000 – REVISED MARCH 2013
Additional functions will copy blocks of data between the RAM and the Flash Memory. These functions
provide a virtual EEPROM capability by allowing the user to emulate a variable amount of EEPROM by
initializing nonvolatile variables from the Flash Memory and occasionally restoring these variables to the
Flash Memory.
The contents of the boot ROM have been defined by TI. Execution of code from the boot ROM is
dependent on the state of the FLEX bit in the Option Register on exit from RESET. If the FLEX bit is a
zero, the Flash Memory is assumed to be empty and execution from the boot ROM begins. For further
information on the FLEX bit, refer to Section Option Register.
2.3.3
DUAL CLOCK AND CLOCK DOUBLER
The device includes a versatile clocking system and two oscillator circuits designed to drive a crystal or
ceramic resonator. The primary oscillator operates at high speed up to 10 MHz. The secondary oscillator
is optimized for operation at 32.768 kHz.
The user can, through specified transition sequences (please refer to Power Saving Features), switch
execution between the high speed and low speed oscillators. The unused oscillator can then be turned off
to minimize power dissipation. If the low speed oscillator is not used, the pins are available as general
purpose bidirectional ports.
The operation of the CPU will use a clock at twice the frequency of the selected oscillator (up to 20 MHz
for high speed operation and 65.536 kHz for low speed operation). This doubled clock will be referred to in
this document as ‘MCLK'. The frequency of the selected oscillator will be referred to as CKI. Instruction
execution occurs at one tenth the selected MCLK rate.
2.3.4
TRUE IN-SYSTEM EMULATION
On-chip emulation capability has been added which allows the user to perform true in-system emulation
using final production boards and devices. This simplifies testing and evaluation of software in real
environmental conditions. The user, merely by providing for a standard connector which can be bypassed
by jumpers on the final application board, can provide for software and hardware debugging using actual
production units.
2.3.5
ARCHITECTURE
The COP8 family is based on a modified Harvard architecture, which allows data tables to be accessed
directly from program memory. This is very important with modern microcontroller-based applications,
since program memory is usually ROM or EPROM, while data memory is usually RAM. Consequently
constant data tables need to be contained in non-volatile memory, so they are not lost when the
microcontroller is powered down. In a modified Harvard architecture, instruction fetch and memory data
transfers can be overlapped with a two stage pipeline, which allows the next instruction to be fetched from
program memory while the current instruction is being executed using data memory. This is not possible
with a Von Neumann single-address bus architecture.
The COP8 family supports a software stack scheme that allows the user to incorporate many subroutine
calls. This capability is important when using High Level Languages. With a hardware stack, the user is
limited to a small fixed number of stack levels.
2.3.6
INSTRUCTION SET
In today's 8-bit microcontroller application arena cost/performance, flexibility and time to market are
several of the key issues that system designers face in attempting to build well-engineered products that
compete in the marketplace. Many of these issues can be addressed through the manner in which a
microcontroller's instruction set handles processing tasks. And that's why the COP8 family offers a unique
and code-efficient instruction set - one that provides the flexibility, functionality, reduced costs and faster
time to market that today's microcontroller based products require.
8
Device Information
Copyright 2000–2013, Texas Instruments Incorporated
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| COP8CBR9HVA8 | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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| COP8CBR9IMT8 | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| COP8CBR9IMT8/NOPB | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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