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| 型號(hào)： | CR16HCT5VJE8Y |
| 英文描述： | Microcontroller |
| 中文描述： | 微控制器 |
| 文件頁(yè)數(shù)： | 105/157頁(yè) |
| 文件大?。?/td> | 1256K |
| 代理商： | CR16HCT5VJE8Y |
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105
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20.9.3
The buffer status, the buffer priority and the data length code
are controlled by manipulating the contents of the Buffer Sta-
tus/Control Register (CNSTAT). CPU and CR16CAN have
access to this register.
Buffer Status/Control Register (CNSTAT)
ST[3:0]
Buffer Status — The CNSTAT register has a
status section, which contains the status infor-
mation of the buffer as shown in Table 26. This
section can be modified by CR16CAN.
The ST0 bits acts as a buffer busy indication.
When the BUSY bit is set, any write access to
the buffer is disabled with the exception of the
lower byte of the CNTSTAT register. The
CR16CAN sets this bit if the buffer data is cur-
rently copied from the hidden buffer or if a mes-
sage is scheduled for transmission or is
currently transmitting. The CR16CAN will al-
ways reset this bit on a status update.
xxx0
16
CNTSTAT
DLC3
DLC2
DLC1
DLC0
Reserved
PRI3
PRI2
PRI1
PRI0
ST3
ST2
ST1
ST0
Table 25
Message Buffer Organization
ADDR
BUFFER
register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
12 11
8
7
4
3
0
DLC[3:0]
Reserved
PRI[3:0]
ST[3:0]
0
r/w
Table 26
Buffer Status Section of the CNSTAT Register
ST3 (DIR)
ST2
ST1
ST0 (BUSY)
Buffer Status
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
RX_NOT_ACTIVE
Reserved for RX_BUSY
a
RX_READY
RX_BUSY0
b
RX_FULL
RX_BUSY1
b
RX_OVERRUN
RX_BUSY2
b
TX_NOT_ACTIVE
Reserved for TX_BUSY
c
TX_ONCE
TX_BUSY0
d
TX_RTR
(automatic response to a remote frame)
Reserved for TX_BUSY1
e
TX_ONCE_RTR
(changes to TX_RTR after transmission)
TX_BUSY2
d
1
0
1
0
1
0
1
1
1
1
1
0
1
1
1
1
a. This condition indicates that the user wrote RX_NOT_ACTIVE to a buffer when the data copy process is still
b. RX_BUSYx indicates that coping is in progress at three possible times
- data is copied for the first time RX_READY
→
RX_BUSY0
- data is copied for the second time RX_FULL
→
RX_BUSY1
- data is copied for the third or more time RX_OVERRUN
→
RX_BUSY2
c. This state indicates that the user wrote TX_NOT_ACTIVE to a transmit buffer which is scheduled for
transmission or is currently transmitting.
active.
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| CR16HCT5VJE9Y | Microcontroller |
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| CR16HCT9VJE7Y | Microcontroller |
| CR16HCT9VJE8 | Microcontroller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CR16HCT5VJE9Y | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| CR16HCT5VJEXY | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CR16MCT9/CR16MCT5/CR16HCT9/CR16HCT5 16-Bit Reprogrammable/ROM Microcontroller |
| CR16HCT9 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CR16MCT9/CR16MCT5/CR16HCT9/CR16HCT5 16-Bit Reprogrammable/ROM Microcontroller |
| CR16HCT9VJE7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| CR16HCT9VJE7Y | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
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