137
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A/D Converter Characteristics
V
CC
= 5V, TA = 25°C
I
OLACB
I
OHW
I
IL
I
L
I
O
(Off)
SDA, SCL Logical 0 CMOS Output Current
Weak Pull-up Current
RESET pin Weak Pull-down Current
High Impedance Input Leakage Current
Output Leakage Current
(I/O pins in input mode)
Digital Supply Current Active Mode
b
Digital Supply Current Active Mode
c
Digital Supply Current Active Mode
d
Digital Supply Current Power Save Mode
e
Digital Supply Current Idle Mode
f
Digital Supply Current Halt Mode
f
Analog Supply Current Active Mode
g
a. Guaranteed by design
b. Run from internal memory, Iout=0mA, X1CKI=20MHz, not programming flash memory
c. Same conditions as Icca1 but programming or erasing one of the flash memory arrays
d. CPU executing an WAIT instruction, Iout=0mA, X1CKI=20MHz, peripherals not active
e. Running from internal memory, Iout=0mA, X1CKI=20MHz, X2CKI=32.768kHz
f. Iout=0mA, X1CKI=Vcc, X2CKI=32.768kHz
g. ADC and analog comparators enabled
j. I
L
adn I
O
are 2.0
μ
A at
85°C
and 5.0
μ
A at 12
5°C
k. I
acq
is 20
μ
A at
85°C
and 50
μ
A at 12
5°C
V
OL
= 0.4V, Vcc=4.5V
V
OH
= 3.8V, Vcc=4.5V
V
IL
= 0.9V, Vcc=4.5V
0V
≤
Vin
≤
Vcc
0V
≤
Vout
≤
Vcc
3.0
-10
mA
μ
A
μ
A
μ
A
μ
A
0.4
2.0
j
- 2.0
- 2.0
2.0
j
Icca1
Iccprog
Icca2
Iccps
Vcc= 5.5V
Vcc= 5.5V
Vcc = 5.5V
Vcc= 5.5V
95
115
58
9
mA
mA
mA
mA
μ
A
μ
A
mA
Iccid
Iccq
Iacc
Vcc = 5.5V
Vcc = 5.5V
Vcc= 5.5V
200
20
k
3
Symbol
Parameter
Conditions
a
a. All parameters specified for f
OSC
=2 MHz, V
DD
= 5.0V
±
10% unless otherwise noted.
b. Integral (Non-linearity) Error — The maximum difference between the best-fit straight line reference and the actual conversion
curves.
c. Differential (Non-linearity) Error — The maximum difference between the best-fit step size of 1 LSB and any actual step size.
d. The resistance between the device input and the internal analog input capacitance.
e. The input signal is measured across the internal capacitance.
f. Conversion result never decreases with an increase in input voltage and has no missing codes.
Min
Typ
Max
Units
N
IL
Integral Error
b
Differential Error
c
V
REF
= V
CC
±
0.5
LSB
N
DL
V
REF
= V
CC
±
1.0
LSB
V
ABSOLUTE
Absolute Error
V
REF
= V
CC
V
REF
<
V
CC
- 0.1
±
1.5
LSB
V
IN
Input Voltage Range
0
V
REF
V
V
REFEX
External Reference Voltage
3.0
V
DD
V
I
VREF
V
REF
input current
V
REF
= 5V
1.2
mA
I
AL
Analog input leakage current
Analog input resistance
d
V
REF
= V
CC
±
1
μ
A
R
AIN
200
W
C
AIN
Analog input capacitance
e
5
pF
t
ADCCLK
Conversion Clock period
500
ns
C
REFEX
External Vref bypass capacitance
0.47
μ
F
t
ACT
First conversion after Vcc stable
30
μ
s
M
MONOTON-
IC
MONOTONICITY
f
GUARANTEED
Symbol
Parameter
Conditions
Min
Max
Units