參數(shù)資料
型號(hào)： CY14E102N-BA20XI
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： SRAM
英文描述： 128K X 16 NON-VOLATILE SRAM, 20 ns, PBGA48
封裝： 6 X 10 MM, 1.20 MM HEIGHT, ROHS COMPLIANT, FBGA-48
文件頁(yè)數(shù)： 15/21頁(yè)
文件大?。?/td> 628K
代理商： CY14E102N-BA20XI
ADVANCE
CY14E102L, CY14E102N
Document Number: 001-45755 Rev. *A
Page 3 of 21
Figure 3. Pin Diagram - 54 TSOP II (Top View)
Pinouts (continued)
NC
DQ7
DQ6
DQ5
DQ4
VCC
DQ3
DQ2
DQ1
DQ0
NC
A0
A1
A2
A3
A4
A5
A6
A7
VCAP
WE
A8
A10
A11
A12
A13
A14
A15
A16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
(Not to Scale)
OE
CE
VCC
VSS
NC
A9
NC
54
53
52
51
49
50
HSB
BHE
BLE
DQ15
DQ14
DQ13
DQ12
VSS
DQ11
DQ10
DQ9
DQ8
(x16)
Pin Definitions
Pin Name
IO Type
Description
A0 – A17
Input
Address Inputs. Used to select one of the 262, 144 bytes of the nvSRAM for x8 Configuration.
A0 – A16
Address Inputs. Used to select one of the 131, 072 bytes of the nvSRAM for x16 Configuration.
DQ0 – DQ7
Input/Output Bidirectional Data IO Lines for x8 Configuration. Used as input or output lines depending on
operation.
DQ0 – DQ15
Bidirectional Data IO Lines for x16 Configuration. Used as input or output lines depending on
operation.
WE
Input
Write Enable Input, Active LOW. When selected LOW, data on the IO pins is written to the address
location latched by the falling edge of CE.
CE
Input
Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.
OE
Input
Output Enable, Active LOW. The active LOW OE input enables the data output buffers during read
cycles. IO pins are tri-stated on deasserting OE high.
BHE
Input
Byte High Enable, Active LOW. Controls DQ15 - DQ8.
BLE
Input
Byte Low Enable, Active LOW. Controls DQ7 - DQ0.
VSS
Ground
Ground for the Device. Must be connected to the ground of the system.
VCC
Power Supply Power Supply Inputs to the Device.
HSB
Input/Output Hardware Store Busy (HSB). When LOW this output indicates that a hardware store is in progress.
When pulled LOW external to the chip it initiates a nonvolatile STORE operation. A weak internal pull
up resistor keeps this pin HIGH if not connected (connection is optional).
VCAP
Power Supply AutoStore Capacitor. Supplies power to the nvSRAM during power loss to store data from the SRAM
to nonvolatile elements.
NC
No Connect No Connect. Do not connect this pin to the die.
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY14E102N-ZS45XCES 制造商:Cypress Semiconductor 功能描述:NVSRAM 2MB 128KX16 44 PIN TSOPII COMMERCIAL TEMP - Trays
CY14E108L-BA45XCES 制造商:Cypress Semiconductor 功能描述:NVSRAM 8MB 1024KX8 FBGA COMMERCIAL TEMP - Trays
CY14E108N-BA45XCES 制造商:Cypress Semiconductor 功能描述:NVSRAM 8MB 512KX16 5 VOLT FBGA COMMERCIAL TEMP - Trays
CY14E256LA-SZ25XI 功能描述:NVRAM 32Kb x8 4.5-5.5V NVSRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲(chǔ)容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時(shí)間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube
CY14E256LA-SZ25XIT 功能描述:NVRAM 32Kb x8 4.5-5.5V NVSRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲(chǔ)容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時(shí)間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube
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