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參數(shù)資料
| 型號： | CY14E102N-BA20XI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 128K X 16 NON-VOLATILE SRAM, 20 ns, PBGA48 |
| 封裝： | 6 X 10 MM, 1.20 MM HEIGHT, ROHS COMPLIANT, FBGA-48 |
| 文件頁數(shù)： | 2/21頁 |
| 文件大?。?/td> | 628K |
| 代理商： | CY14E102N-BA20XI |
ADVANCE
CY14E102L, CY14E102N
Document Number: 001-45755 Rev. *A
Page 10 of 21
AutoStore and Power Up RECALL
Parameters
Description
CY14E102L/CY14E102N
Unit
Min
Max
tHRECALL
Power Up RECALL Duration
20
ms
tSTORE
STORE Cycle Duration
15
ms
VSWITCH
Low Voltage Trigger Level
4.4
V
tVCCRISE
VCC Rise Time
150
μs
Software Controlled STORE and RECALL Cycle
The following table lists the software controlled STORE and RECALL cycle parameters.[18, 19]
Parameters
Description
15ns
20 ns
25ns
45ns
Unit
Min
Max
Min
Max
Min
Max
Min
Max
tRC
STORE and RECALL Initiation Cycle Time
15
20
25
45
ns
tAS
Address Setup Time
0
ns
tCW
Clock Pulse Width
12
15
20
30
ns
tGHAX
Address Hold Time
1
ns
tRECALL
RECALL Duration
200
μs
tSS
Soft Sequence Processing Time
70
μs
Hardware STORE Cycle
Parameters
Description
CY14E102L/CY14E102N
Unit
Min
Max
tDELAY
Time allowed to complete SRAM cycle
1
70
μs
tHLHX
Hardware STORE pulse width
15
ns
Notes
16. tHRECALL starts from the time VCC rises above VSWITCH.
17. If an SRAM Write has not taken place since the last nonvolatile cycle, no STORE takes place.
18. The software sequence is clocked with CE controlled or OE controlled reads.
19. The six consecutive addresses must be read in the order listed in the mode selection table. WE must be HIGH during all six consecutive cycles.
20. This is the amount of time it takes to take action on a soft sequence command.Vcc power must remain HIGH to effectively register command.
21. Commands such as STORE and RECALL lock out IO until operation is complete which further increases this time. See the specific command
.
22. On a hardware STORE initiation, SRAM operation continues to be enabled for time tDELAY to allow read and write cycles to complete.
相關PDF資料 |
PDF描述 |
|---|---|
| CY14E102N-ZSP45XIT | 128K X 16 NON-VOLATILE SRAM, 45 ns, PDSO54 |
| CY21DF-FREQ2-OUT23 | VCXO, CLOCK, 65 MHz - 160 MHz, CMOS/TTL OUTPUT |
| CY23CH-FREQ-OUT23 | VCXO, CLOCK, 1.25 MHz - 65 MHz, CMOS/TTL OUTPUT |
| CY22DF-FREQ2-OUT23 | VCXO, CLOCK, 65 MHz - 160 MHz, CMOS/TTL OUTPUT |
| CY12FF-FREQ1-OUT23 | VCXO, CLOCK, 1.25 MHz - 65 MHz, CMOS/TTL OUTPUT |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY14E102N-ZS45XCES | 制造商:Cypress Semiconductor 功能描述:NVSRAM 2MB 128KX16 44 PIN TSOPII COMMERCIAL TEMP - Trays |
| CY14E108L-BA45XCES | 制造商:Cypress Semiconductor 功能描述:NVSRAM 8MB 1024KX8 FBGA COMMERCIAL TEMP - Trays |
| CY14E108N-BA45XCES | 制造商:Cypress Semiconductor 功能描述:NVSRAM 8MB 512KX16 5 VOLT FBGA COMMERCIAL TEMP - Trays |
| CY14E256LA-SZ25XI | 功能描述:NVRAM 32Kb x8 4.5-5.5V NVSRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| CY14E256LA-SZ25XIT | 功能描述:NVRAM 32Kb x8 4.5-5.5V NVSRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
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