參數(shù)資料
型號(hào): DAC1008D750HN
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Dual 10-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating
封裝: DAC1008D750HN/C1<SOT804-3|<<<1<Always Pb-free,;DAC1008D750HN/C1<SOT804-3|<<<1<Always Pb-free,;
文件頁數(shù): 21/99頁
文件大?。?/td> 547K
代理商: DAC1008D750HN
DAC1008D750
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 5 January 2011
21 of 99
NXP Semiconductors
DAC1008D750
2
×
, 4
×
or 8
×
interpolating DAC with JESD204A
10.2.5.4
All slave mode
The external reference is provided by the JESD204A transmitter. All DACs are configured
in slave mode.
The MDS signal is now driven from the transmitter. It is generated at the end of the
inter-lane alignment phase (see the JESD204A standard for details).
The transmitter must also compensate for the DAC latency. Although the DAC has an
internal samples delay line, it cannot handle large delays.
In this mode, PCB layout is also important. The following delay equation applies:
δ
t <
Δ
t
mds
< TDAC
δ
t, where
δ
t is the clock skew considered close to DAC pins.
Fig 11. All slave mode
001aal069
I
BUFFER
Q
DIG
COMP
ref_A
SYNC_0
JESD204A
TX
mds_out
mds_in
DAC
CLK
MGMT
I
BUFFER
Q
DIG
COMP
ref_A
SYNC_1
mds_out
mds_in
DAC
CLK
MGMT
I
BUFFER
SLAVE
DAC 0
SLAVE
DAC 1
SLAVE
DAC 2
Q
DIG
/A/
INSERTION
COMP
ref_A
SYNC_2
MDS
dT
mds_out
mds_in
DAC
CLK
MGMT
CLOCK
DISTRIBUTION
REF_CLOCK
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DAC1008D750HN/C1,5 功能描述:數(shù)模轉(zhuǎn)換器- DAC DL 10BIT DAC 750MSPS 2X 4X OR 8X INT RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
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