參數(shù)資料
型號： DDC112
英文描述： Dual Current Input 20-Bit ANALOG-TO-DIGITAL CONVERTER
中文描述： 雙路電流輸入20位模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù)： 2/24頁
文件大?。?/td> 210K
代理商： DDC112
2
DDC112
SPECIFICATIONS
At T
= +25
°
C, AV
= DV
= +5V, DDC112U: T
= 500
μ
s, CLK = 10MHz, DDC112UK: T
INT
= 333.3
μ
s, CLK = 15MHz, V
REF
= +4.096V, continuous mode
operation, and internal integration capacitors, unless otherwise noted.
NOTES: (1) Input is less than 1% of full scale. (2) C
is the capacitance seen at the DDC112 inputs from wiring, photodiode, etc. (3) FSR is Full-Scale Range.
(4) A best-fit line is used in measuring linearity. (5) Matching between side A and side B, not input 1 to input 2. (6) Voltage produced by the DDC112 at its input which
is applied to the sensor. (7) Range drift does not include external reference drift. (8) Input reference current decreases with increasing T
INT
(see text). (9) Data format
is Straight Binary with a small offset (see text). (10) Guaranteed but not tested.
DDC112U
DDC112UK
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
ANALOG INPUTS
External, Positive Full-Scale
Range 0
Internal, Positive Full-Scale
Range 1
Range 2
Range 3
Range 4
Range 5
Range 6
Range 7
Negative Full-Scale Input
DYNAMIC CHARACTERISTICS
Conversion Rate
Integration Time, T
INT
Integration Time, T
System Clock Input (CLK)
Data Clock (DCLK)
ACCURACY
Noise, Low Level Current Input
(1)
C
SENSOR(2)
= 0pF, Range 5 (250pC)
C
SENSOR
= 25pF, Range 5 (250pC)
C
SENSOR
= 50pF, Range 5 (250pC)
Differential Linearity Error
C
EXT
= 250pF
1000
6
pC
47.5
95
142.5
190
237.5
285
332.5
50
100
150
200
250
300
350
52.5
105
157.5
210
262.5
315
367.5
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
pC
pC
pC
pC
pC
pC
pC
pC
–0.4% of Positive FS
2
3
6
kHz
μ
s
μ
s
MHz
MHz
Continuous Mode
Non-continuous Mode
500
50
1
1,000,000
333.3
6
6
10
12
12
6
15
15
3.2
3.8
4.2
6
6
6
ppm of FSR
(3)
, rms
ppm of FSR, rms
ppm of FSR, rms
6.0
7
±
0.005% Reading
±
0.5ppm
FSR, max
±
0.005% Reading
±
0.5ppm
FSR, typ
±
0.025% Reading
±
1.0ppm
FSR, max
20
0.1
6
Integral Linearity Error
(4)
6
6
No Missing Codes
Input Bias Current
Range Error
Range Error Match
(5)
Range Sensitivity to V
REF
Offset Error
Offset Error Match
(5)
DC Bias Voltage
(6)
(Input V
)
Power Supply Rejection Ratio
Internal Test Signal
Internal Test Accuracy
PERFORMANCE OVER TEMPERATURE
Offset Drift
Offset Drift Stability
DC Bias Voltage Drift
Input Bias Current Drift
Input Bias Current
Range Drift
(7)
Range Drift Match
(5)
REFERENCE
Voltage
Input Current
(8)
DIGITAL INPUT/OUTPUT
Logic Levels
V
IH
V
IL
V
OH
V
Input Current, I
IN
Data Format
(9)
POWER SUPPLY REQUIREMENTS
Power Supply Voltage
Supply Current
Analog Current
Digital Current
Total Power Dissipation
TEMPERATURE RANGE
Specified Performance
Storage
6
6
Bits
pA
T
= +25
°
C
Range 5 (250pC)
All Ranges
V
= 4.096
±
0.1V
Range 5, (250pC)
10
5
0.5
6
6
6
% of FSR
% of FSR
0.1
1:1
±
200
±
100
±
0.05
±
25
13
±
10
6
6
6
6
6
6
6
6
±
600
ppm of FSR
ppm of FSR
mV
ppm of FSR/V
pC
%
±
2
±
200
6
6
±
0.5
±
0.2
3
0.01
2
25
±
0.05
±
3
(10)
±
0.7
(10)
ppm of FSR/
°
C
ppm of FSR/minute
μ
V/
°
C
pA/
°
C
pA
ppm/
°
C
ppm/
°
C
6
±
1
6
6
25
6
Applied to Sensor Input
+25
°
C to +45
°
C
T
= +75
°
C
Range 5 (250pC)
Range 5 (250pC)
1
(10)
50
(10)
6
6
0
50
(10)
4.000
4.096
150
4.200
6
6
6
V
μ
A
T
INT
= 500
μ
s
225
275
4.0
–0.3
4.5
DV
DD
+ 0.3
6
6
6
6
6
V
V
V
V
μ
A
I
OH
= –500
μ
A
I
OL
= 500
μ
A
0.4
+10
6
6
–10
6
Straight Binary
6
AV
DD
and DV
DD
4.75
5.25
6
6
V
AV
DD
= +5V
DV
DD
= +5V
14.8
1.2
80
15.2
1.8
85
mA
mA
mW
100
130
–40
–60
+85
+100
0
6
+70
6
°
C
°
C
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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