Note: All digital pins are I/O pins in JTAG mode. This feature is to increase the effectivene" />
參數(shù)資料
型號: DS32512N+
廠商: Maxim Integrated Products
文件頁數(shù): 37/130頁
文件大小: 0K
描述: IC LIU DS3/E3/STS-1 12P 484-BGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 30
類型: 線路接口裝置(LIU)
規(guī)程: DS3
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 484-BGA
供應(yīng)商設(shè)備封裝: 484-BGA(23x23)
包裝: 管件
DS32506/DS32508/DS32512
14 of 130
7. PIN DESCRIPTIONS
Note: All digital pins are I/O pins in JTAG mode. This feature is to increase the effectiveness of board-level ATPG
patterns to isolate interconnect failures.
7.1 Short Pin Descriptions
n = port number (1 to 12 for DS32512, 1 to 8 for DS32508, 1 to 6 for DS32506). I = input, Ipu = input with internal pullup resistor, Ipd = input with
internal pulldown resistor, Ia = analog input, I/O = bidirectional in/out, I/Opd = bidirectional in/out with internal pulldown resistor, O = output,
Oz = high-impedance output (needs an external pullup or pulldown resistor to keep the node from floating), Oa = analog output (high
impedance), P = power supply or ground. All unused input pins without pullup should be tied low. Note: All internal pullup resistors are 50k
Ω tied
to approximately 2.2V DC. See Section 12 for pin assignments.
Table 7-1. Short Pin Descriptions
NAME
TYPE
FUNCTION
ANALOG LINE INTERFACE
Oa
Transmit Positive Analog (Port n)
Oa
Transmit Negative Analog (Port n)
Ia
Receive Positive Analog (Port n)
Ia
Receive Negative Analog (Port n)
DIGITAL FRAMER INTERFACE
I
Transmit Clock (Port n)
I
Transmit Positive AMI/Transmit NRZ Data (Port n)
I
Transmit Negative AMI (Port n)
Oz
Receive Clock (Port n)
Oz
Receive Positive AMI/Receive NRZ Data (Port n)
Oz
Receive Negative AMI/Receive Line Code Violation (Port n)
GLOBAL I/O
I
Microprocessor Interface Select
Ipd
Hardware Interface Enable
I
Factory Test Enable (Active Low)
I
High-Impedance Test Enable (Active Low)
Ipu
Reset (Active Low)
Oa
Reference Resistor
HARDWARE INTERFACE
Ipd
LIU Mode Control (DS3, E3, or STS-1) (Port n)
Ipd
AIS Type Control (All Ports)
Ipd
Transmit AIS Control (Port n)
Ipd
Transmit Binary Interface Control (All Ports)
Ipd
Transmit Common Clock Control (All Ports)
Ipd
Transmit Clock Invert Control (All Ports)
O
Transmit Driver Monitor Status (Port n)
Ipd
Transmit Line Build-Out Control (Port n)
Ipd
Transmit Output-Enable Control (Port n)
Ipd
Transmit Power-Down (All Ports)
I
Internal Termination Resistance Enable (Tx and Rx) (All Ports)
Ipd
Receive Binary Interface Control (All Ports)
Ipd
Receive Clock Invert Control (All Ports)
O
Receive Loss-of-Signal Status (Port n)
Ipd
Receive Monitor Preamp Control (Port n)
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