參數(shù)資料
型號: DSM2150F5V
廠商: 意法半導(dǎo)體
元件分類: 數(shù)字信號處理
英文描述: DSM (Digital Signal Processor System Memory) for Analog Devices DSPs (3.3V Supply)
中文描述: 帝斯曼(數(shù)字信號處理器系統(tǒng)內(nèi)存)的ADI公司的DSP(3.3V電源)
文件頁數(shù): 13/73頁
文件大?。?/td> 1067K
代理商: DSM2150F5V
13/73
DSM2150F5V
RUNTIME CONTROL REGISTER DEFINITION
A block of 256 addresses are decoded inside the
DSM2150F5V for control and status. 50 locations
contain registers that the DSP accesses at runt-
ime. The base address of the registers is called
csiop
(Chip Select I/O Port). Table
4
lists the reg-
isters and their offsets (in hexadecimal) from the
csiop base. See Appendix
B
for bit definitions.
Note:
Do not write to unused locations, they
should remain logic zero.
Note:
See
Table 14., page 48
for register state at
reset and at power-on.
Table 4. CSIOP Registers and Their Offsets (in Hexadecimal)
Register
Name
Port
A
Port
B
Port
C
Port
D
Port
E
Port
G
Other
Description
Data In
00
01
10
11
30
41
MCUI/O Input Mode. Read to obtain current logic
level of Port pins. No WRITEs.
Data Out
04
05
14
15
34
45
MCU I/O Output Mode. Write to set logic level on
Port pins. Read to check status.
Direction
06
07
16
17
36
47
MCU I/O Mode. Configures Port pin as input or
output. Write to set direction of Port pins.
Logic
1
= out, Logic
0
= in. Read to check status.
Drive Select
08
09
18
19
38
49
Write to configure Port pins as either standard
CMOS or Open Drain on some pins, while selecting
high slew rate on other pins. Read to check status.
Input
Macrocells
0A
0B
1A
Read to obtain state of IMCs. No WRITEs.
Enable Out
0C
0D
1C
Read to obtain the status of the output enable logic
on each I/O Port driver. No WRITEs.
Output
Macrocells A
20
Read to get logic state of output of OMC bank A.
Write to load registers of OMC bank A.
Output
Macrocells B
21
Read to get logic state of output of OMC bank B.
Write to load registers of OMC bank B.
Mask
Macrocells A
22
Write to set mask for loading OMCs in bank A. Logic
1
in a bit position will block READs/WRITEs of the
corresponding OMC. Logic
0
will pass OMC value.
Read to check status.
Mask
Macrocells B
23
Write to set mask for loading OMCs in bank B. Logic
1
in a bit position will block READs/WRITEs of the
corresponding OMC. Logic
0
will pass OMC value.
Read to check status.
Main Flash
Sector Protect
C0
Read to determine Main Flash Sector Protection
Setting. No WRITEs.
Security Bit
and
Secondary
Flash Sector
Protection
C2
Read to determine if DSM devices Security Bit is
active. Logic
1
= device secured.
Also read to determine Secondary Flash Protection
Setting status. No WRITEs.
JTAG Enable
C7
Write to enable JTAG Pins (optional feature). Read to
check status.
PMMR0
B0
Power Management Register 0. WRITE and READ.
PMMR2
B4
Power Management Register 2. WRITE and READ.
Page
E0
Memory Page Register. WRITE and READ.
Memory_ID0
F0
Read to get size of Main Flash memory. No WRITEs.
Memory_ID1
F1
Read to get size of 2nd Flash memory. No WRITEs.
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