參數(shù)資料
型號: DSM2150F5V
廠商: 意法半導(dǎo)體
元件分類: 數(shù)字信號處理
英文描述: DSM (Digital Signal Processor System Memory) for Analog Devices DSPs (3.3V Supply)
中文描述: 帝斯曼(數(shù)字信號處理器系統(tǒng)內(nèi)存)的ADI公司的DSP(3.3V電源)
文件頁數(shù): 33/73頁
文件大小: 1067K
代理商: DSM2150F5V
33/73
DSM2150F5V
DSP BUS INTERFACE
The
no-glue logic
DSP Bus Interface allows di-
rect connection. DSP address, data, and control
signals connect directly to the DSM device. See
Appendices for typical connections.
DSP address, data and control signals are routed
to Flash memory, I/O control (csiop), OMCs, and
IMCs within the DMS. The DSP address range for
each of these components is specified in PSDsoft
Express
.
Typical Memory Map, DSM2150F5V and
ADSP21535 BLACKFIN DSP
There many different ways to place (or map) the
addresses of DSM memory and I/O depending on
system requirements. The DPLD allows complete
mapping flexibility.
Figure 11., page 34
shows one
possible system memory map.
In this example, the DSP will bypass it
s internal
boot ROM at power-on and begin executing code
directly from the DSM2150F5V secondary Flash
memory. While executing this code, the DSP will
load the contents of the DSM2150F5V main Flash
memory into the ADSP-21535 internal SRAM,
then execute code from that high performance
SRAM.
The advantage of this is speed, flexibility, IAP,
clean software partitioning, and parameter stor-
age.
Loading external Flash memory to internal
SRAM by 16-bits is faster than booting by 8-
bits. Also, subsequent loading of new memory
overlays during runtime is also faster by 16-
bits.
Bypassing internal DSP boot ROM and
executing from DSM secondary memory
provides total flexibility to meet system
requirements. Like having custom boot ROM
programmable by JTAG.
In-Application Programming (IAP) can be
implemented by placing custom loader code in
DSM secondary flash which, when executed,
allows the DSP to receive data over any
communication channel (i.e. USB) and write
new code/data the DSM main flash memory.
Since the DSM Flash arrays are independent,
it is possible to read from the secondary flash
while writing to the main Flash.
Since the DSM secondary Flash has smaller
sector sizes, small data sets and calibration
constants may be stored there. EEPROM
emulation techniques can be used.
Placing start-up and IAP code in DSM
secondary Flash keeps it totally separate DSM
main flash memory, affording clean software
partitioning. This also ensures robust system
operaton since start-up code will always be
there and removed from accitental WRITEs or
erasures of DSM main flash.
The nomenclature
fs0..fs7
in
Figure 11., page 34
are designators for the individual sectors of Main
Flash memory, 64 KBytes each.
csboot0..csboot3
are designators for the individual Secondary Flash
memory segments, 8 KBytes each. csiop desig-
nates the DSM control register block.
The designer may easily specify memory mapping
in a point-and-click software environment using
PSDsoft Express
.
Specifying the Memory Map with PSDsoft
Express
The memory map shown in
Figure 11., page 34
can be easily implemented using PSDsoft Ex-
press
in a point-and-click environment. PSDsoft
Express
will generate Hardware Definition Lan-
guage (HDL) statements of the ABEL language.
Table 12., page 35
shows the resulting equations
generated by PSDsoft Express
.
Specifying these equations using PSDsoft Ex-
press
is very simple.
Figure 12., page 35
shows
how to specify the equation for the 64 KByte Flash
memory segment,
fs0
. Notice
fs0
is qualified with
the signal
AMS0
. This specification process is re-
peated for all other Flash memory segments, the
csiop register block, and any external chip select
signals that may be needed.
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