參數(shù)資料
型號(hào)： DSM2190F4V
廠商： 意法半導(dǎo)體
元件分類： 數(shù)字信號(hào)處理
英文描述： 16-bit fixed point DSP with Flash
中文描述： 具有閃存的 16 位定點(diǎn) DSP
文件頁(yè)數(shù)： 17/61頁(yè)
文件大?。?/td> 530K
代理商： DSM2190F4V
17/61
DSM2190F4
Table 5. Instruction Sequences
1,2,3,4
Instruction
Sequence
Note: 1.
All values are in hexadecimal, X = Don’t Care
2. A desired internal Flash memory sector select signal (FS0 - FS7 or CSBOOT0 - CSBOOT3) must be active for each write or read
cycle. Only one of these sector select signals will be active at any given time depending on the address presented by the DSP and
the memory mapping defined in PSDsoft Express. FS0 - FS7 and CSBOOT0-CSBOOT3 are active high logic internally.
3. DSP addresses A18 through A12 are Don’t Care during the instruction sequence decoding. Only address bits A11-A0 are used
during Flash memory instruction sequence decoding bus cycles. The individual sector select signal (FS0 - FS7 or CSBOOT0-
CSBOOT3) which is active during the instruction sequences determines the complete address.
4. For write operations, addresses are latched on the falling edge of Write Strobe (WR, CNTL0), Data is latched on the rising edge of
Write Strobe (WR, CNTL0)
5. No Unlock or Instruction cycles are required when the device is in the Read Array mode. Operation is like reading a ROM device.
6. The Reset Flash instruction is required to return to the normal Read Array mode if the Error Flag (DQ5) bit goes High, or after read-
ing the Flash Identifier or after reading the Sector Protection Status.
7. The DSP cannot invoke this instruction sequence while executing code from the same Flash memory as that for which the instruc-
tion sequence is intended. The DSP must fetch, for example, the code from the DSP SRAM when reading the Flash memory Iden-
tifier or Sector Protection Status.
8. The data is 00h for an unprotected sector, and 01h for a protected sector. In the fourth cycle, the Sector Select is active, and
(A1,A0)=(1,0)
9. Directing this command to any individual active Flash memory segment (FS0 - FS7) will invoke the bulk erase of all eight Flash
memory sectors.
10. DSP writes command sequence to initial segment to be erased, then writes the byte 30h to additional sectors to be erased. The
byte 30h must be addressed to one of the other Flash memory segments (FS0 - FS7) for each additional segment (write 30h to any
address within a desired sector). No more than 80uS can elapse between subsequent additional sector erase commands.
11. The system may perform Read and Program cycles in non-erasing sectors, read the Flash ID or read the Sector Protect Status,
when in the Suspend Sector Erase mode. The Suspend Sector Erase instruction sequence is valid only during a Sector Erase cycle.
12. The Resume Sector Erase instruction sequence is valid only during the Suspend Sector Erase mode.
Cycle 1
Cycle 2
Cycle 3
Cycle 4
Cycle 5
Cycle 6
Cycle 7
Read Memory
Contents
5
Read byte
from any
valid Flash
memory addr
Read Flash
Identifier (Main
Flash only)
6,7
Write AAh to
XX555h
Write 55h
to XXAAAh
Write 90h
to XX555h
Read identifier
with addr lines
A6,A1,A0 =
0,0,1
Read Memory
Sector Protection
Status
6,7,8
Write AAh to
XX555h
Write 55h
to XXAAAh
Write 90h
to XX555h
Read identifier
with addr lines
A6,A1,A0 =
0,1,0
Program a Flash
Byte
Write AAh to
XX555h
Write 55h
to XXAAAh
Write A0h
to XX555h
Write
(program)
data to addr
Flash Bulk Erase
9
Write AAh to
XX555h
Write 55h
to XXAAAh
Write 80h
to XX555h
Write AAh to
XX555h
Write 55h
to XXAAAh
Write 10h
to XX555h
Flash Sector
Erase
10
Write AAh to
XX555h
Write 55h
to XXAAAh
Write 80h
to XX555h
Write AAh to
XX555h
Write 55h
to XXAAAh
Write 30h
to another
Sector
Write 30h
to another
Sector
Suspend Sector
Erase
11
Write B0h to
address that
activates any
of FS0 - FS7
Resume Sector
Erase
12
Write 30h to
addr that
activates any
of FS0 - FS7
Reset Flash
6
Write F0h to
address that
activates any
of FS0 - FS7
相關(guān)PDF資料
PDF描述
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