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參數資料
| 型號： | DSM2190F4V |
| 廠商： | 意法半導體 |
| 元件分類： | 數字信號處理 |
| 英文描述： | 16-bit fixed point DSP with Flash |
| 中文描述： | 具有閃存的 16 位定點 DSP |
| 文件頁數： | 18/61頁 |
| 文件大?。?/td> | 530K |
| 代理商： | DSM2190F4V |
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DSM2190F4
18/61
Instruction Sequences
An instruction sequence consists of a sequence of
specific write or read operations. Each byte written
to the device is received and sequentially decoded
and not executed as a standard write operation to
the memory array. The instruction sequence is ex-
ecuted when the correct number of bytes are prop-
erly received and the time between two
consecutive bytes is shorter than the time-out pe-
riod. Some instruction sequences are structured to
include read operations after the initial write oper-
ations.
The instruction sequence must be followed exact-
ly. Any invalid combination of instruction bytes or
time-out between two consecutive bytes while ad-
dressing Flash memory resets the device logic into
Read Array mode (Flash memory is read like a
ROM device). The device supports the instruction
sequences summarized in Table 5:
Flash memory:
I
Erase memory by chip or sector
I
Suspend or resume sector erase
I
Program a Byte
I
Reset to Read Array mode
I
Read primary Flash Identifier value
I
Read Sector Protection Status
These instruction sequences are detailed in Table
5. For efficient decoding of the instruction se-
quences, the first two bytes of an instruction se-
quence are the coded cycles and are followed by
an instruction byte or confirmation byte. The coded
cycles consist of writing the data AAh to address
XX555h during the first cycle and data 55h to ad-
dress XXAAAh during the second cycle. Address
signals A18-A12 are Don’t Care during the instruc-
tion sequence Write cycles. However, the appro-
priate internal Sector Select (
FS0-FS7 or
CSBOOT0-CSBOOT3
) must be selected internal-
ly (active, which is logic 1).
Reading Flash Memory
Under typical conditions, the DSP may read the
Flash memory using read operations just as it
would a ROM or RAM device. Alternately, the DSP
may use read operations to obtain status informa-
tion about a Program or Erase cycle that is cur-
rently in progress. Lastly, the DSP may use
instruction sequences to read special data from
these memory blocks. The following sections de-
scribe these read instruction sequences.
Read Memory Contents.
Flash
placed in the Read Array mode after Power-up,
chip reset, or a Reset Flash memory instruction
sequence (see Table 5). The DSP can read the
memory contents of the Flash memory by using
read operations any time the read operation is not
part of an instruction sequence.
Read Main Flash Identifier.
The
memory identifier is read with an instruction se-
quence composed of 4 operations: 3 specific write
operations and a read operation (see Table 5).
During the read operation, address bits A6, A1,
and A0 must be 0,0,1, respectively, and the appro-
priate internal Sector Select (
FS0-FS7
) must be
active. The identifier is 0xE7. Not Applicable to
Secondary Flash.
Read Memory Sector Protection Status.
The
Flash memory Sector Protection Status is read
with an instruction sequence composed of 4 oper-
ations: 3 specific write operations and a read oper-
ation (see Table 5). During the read operation,
address bits A6, A1, and A0 must be 0,1,0, re-
spectively, while internal Sector Select (FS0-FS7
or CSBOOT0-CSBOOT3) designates the Flash
memory sector whose protection has to be veri-
fied. The read operation produces 01h if the Flash
memory sector is protected, or 00h if the sector is
not protected.
The sector protection status can also be read by
the DSP accessing the Flash memory Protection
registers in
csiop
space. See the section entitled
“Flash Memory Sector Protect” for register defini-
tions.
memory
is
Main
Flash
Table 6. Status Bit Definition
Note: 1. X = Not guaranteed value, can be read either 1 or 0.
2. DQ7-DQ0 represent the Data Bus bits, D7-D0.
Reading the Erase/Program Status Bits.
The
device provides several status bits to be used by
the DSP to confirm the completion of an Erase or
Program cycle of Flash memory. These status bits
minimize the time that the DSP spends performing
these tasks and are defined in Table 6. The status
bits can be read as many times as needed.
Functional Block
FS0-FS7, or
CSBOOT0-CSBOOT3
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
Flash Memory
Active (the desired
segment is selected)
Data
Polling
Toggle
Flag
Error
Flag
X
Erase
Time-
out
X
X
X
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相關代理商/技術參數 |
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| DSM2190F4V-15K6 | 功能描述:SPLD - 簡單可編程邏輯器件 3.3V 16M 150ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| DSM2190F4V-15T6 | 功能描述:SPLD - 簡單可編程邏輯器件 3.3V 16M 150ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| DSM-22LA | 制造商:Tenma 功能描述:Dual Digital Satellite Meter |
| DSM2C250 | 制造商:Molex 功能描述:REED SWITCH W/NC 3P M/MP 5M |
| DSM2C500 | 制造商:Molex 功能描述: |
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