參數(shù)資料
型號: DSM2190F4V
廠商: 意法半導(dǎo)體
元件分類: 數(shù)字信號處理
英文描述: 16-bit fixed point DSP with Flash
中文描述: 具有閃存的 16 位定點 DSP
文件頁數(shù): 25/61頁
文件大?。?/td> 530K
代理商: DSM2190F4V
25/61
DSM2190F4
DECODE PLD (DPLD)
The DPLD, shown in Figure 14, is used for decod-
ing the address for internal and external compo-
nents. The DPLD can be used to generate the
following decode signals:
I
8 Main Flash memory Sector Select (FS0-FS7)
signals with three product terms each
I
4 Secondary Flash memory Sector Select
(CSBOOT0-CSBOOT3) signals with three
product terms each
I
1 internal csiop select for DSM device control
and status registers (csiop is the base address
of the block of 256 byte locations)
I
1 JTAG Select signal (enables JTAG operations
on Port C when multiplexing JTAG signals with
general I/O signals)
I
3 external chip select output signals for Port D
pins, each with one product term.
Figure 14. DPLD Logic Array
(INPUTS)
(16)
(8)
(16)
(3)
CNTRL[2:0] (Read/Write Control Signals)
I/O PORTS (PORT A,B,C)
(8)
PG0-PG7
(8)
MCELLAB.FB [7:0] (Feedback)
MCELLBC.FB [7:0] (Feedback)
A[15:0]
(3)
(1)
PD[2:0]
RESET
(1)
RD_BSY
CSIOP
JTAGSEL
ECS0
ECS1
8 Flash Main
Memory
Sector Selects
I/O Decoder
Select
JTAG ISP
FS0
FS7
3
3
3
3
3
3
3
3
1
ECS2
FS1
FS2
FS3
FS6
FS5
FS4
1
1
1
1
External Chip Selects
to PORT D
CSBOOT0
CSBOOT1
CSBOOT2
CSBOOT3
4 Secondary
Flash Memory
Sector Selects
3
3
3
3
AI04958
相關(guān)PDF資料
PDF描述
DSM2190F4V-15K6 16-bit fixed point DSP with Flash
DSM2190F4V-15T6 16-bit fixed point DSP with Flash
DSM3MA GENERAL-USE RECTIFIER DIODE
DSP-A1092 NATURAL SOUND AV AMPLIFIRE
DSP101 DSP-Compatible Sampling Single/Dual ANALOG-TO-DIGITAL CONVERTERS
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