參數(shù)資料
型號(hào): DSP56301PW80
廠商: Freescale Semiconductor
文件頁數(shù): 35/124頁
文件大?。?/td> 0K
描述: IC DSP 24BIT 80MHZ 208-LQFP
標(biāo)準(zhǔn)包裝: 36
系列: DSP563xx
類型: 定點(diǎn)
接口: 主機(jī)接口,SSI,SCI
時(shí)鐘速率: 80MHz
非易失內(nèi)存: ROM(9 kB)
芯片上RAM: 24kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 3.30V
工作溫度: -40°C ~ 100°C
安裝類型: 表面貼裝
封裝/外殼: 208-LQFP
供應(yīng)商設(shè)備封裝: 208-LQFP
包裝: 托盤
DSP56301 Technical Data, Rev. 10
1-14
Freescale Semiconductor
Signals/Connections
HSERR
HIRQ
Output, open
drain
Output, open
drain
Tri-stated
Host System Error
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host System Error signal.
Host Interrupt Request
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Interrupt Request signal.
Port B
When the HI32 is configured as GPIO through the DCTR, this signal is
internally disconnected.
This input is 5 V tolerant.
HSTOP
HWR/HRW
Input/
Output
Input
Tri-stated
Host Stop
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host Stop signal.
Host Write/Host Read-Write
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Write/Host Read-Write Schmitt-trigger
signal.
Port B
When the HI32 is configured as GPIO through the DCTR, this signal is
internally disconnected.
This input is 5 V tolerant.
HIDSEL
HRD/HDS
Input
Host Initialization Device Select
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host Initialization Device Select signal.
Host Read/Host Data Strobe
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Data Read/Host Data Strobe Schmitt-
trigger signal.
Port B
When the HI32 is configured as GPIO through the DCTR, this signal is
internally disconnected.
This input is 5 V tolerant.
HFRAME
Input/
Output
Tri-stated
Host Frame
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host cycle Frame signal.
Non-PCI bus
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this signal must be connected to a pull-up resistor or
directly to VCC.
Port B
When the HI32 is configured as GPIO through the DCTR, this signal is
internally disconnected.
This input is 5 V tolerant.
Table 1-11.
Host Interface (Continued)
Signal Name
Type
State During
Reset
Signal Description
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