參數(shù)資料
型號(hào)： DSP56600
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： Implementing Viterbi Decoders Using the VSL Instruction on DSP Families
中文描述： 維特比解碼器實(shí)現(xiàn)上使用DSP的家庭教學(xué)的VSL
文件頁(yè)數(shù)： 26/108頁(yè)
文件大?。?/td> 726K
代理商： DSP56600
2-12
Viterbi Decoder Implementation
For More Information On This Product,
Go to: www.freescale.com
The Viterbi Algorithm
Algorithmic Enhancements
2.4
ALGORITHMIC ENHANCEMENTS
There are a number of modifications that can be made to the algorithm in order to
improve its effectiveness as well as our ability to implement it. In our example, we count
agreements. This produces branch metrics of 0, 1, and 2. In our example butterfly,
however, the branch metrics into the state pair are all 0s and 2s. This is not entirely a
coincidence. For this code, the encoding polynomials both have taps at both extremes.
What this means is that a 1/0 at the end of the encoder will invert/not invert the encoder
output. For our trellis, this means that the pair of branches into a given state will always
have complementary branch metrics (0 and 2, or 1 and 1). By combining this observation
with one more property, we can simplify the Viterbi butterfly computation.
The additional property for this code (shown in
Figure 2-8
) is that a 1/0 at the input bit
will invert/not invert the encoder output. For our trellis, this means that the two states
of a state pair being updated will have the same branch metrics, but with their order
reversed (0 and 2 will become 2 and 0, etc.). These polynomial conditions are not true in
general but do occur quite often. To take advantage of them, we subtract 1 from every
branch metric we produce. This gives branch metric pairs of (-1,1) and (0,0).
As shown in
Figure 2-9
, each pair now has odd symmetry in the two components.
Hence, we need not compute branch metrics for both branches in an update. Instead, we
can find just the uppermost branch metric, and add it as usual for the upper branch.
Next, subtract rather than add it to do the lower branch processing. To process the lower
state update, we subtract the branch metric for the upper path and add to update the
lower path. The total path metrics change, but their relative values do not. Since we are
only looking for the path with the maximum path metric, the results are the same.
F
Freescale Semiconductor, Inc.
n
.
相關(guān)PDF資料
PDF描述
DSP56852E 16-bit Digital Signal Controllers
DSP56852VFE 16-bit Digital Signal Controllers
DSP56853E 16-bit Digital Signal Controllers
DSP56853FG120 16-bit Digital Signal Controllers
DSP56853FGE 16-bit Digital Signal Controllers
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSP56600AD 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:INTERGRATED CELLULAR BASEBAND PROCESSOR DEVELOPMENT IC
DSP56600FM 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:16-BIT DIGITAL SIGNAL PROCESSOR
DSP56602 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:16-Bit Digital Signal Processor User manual
DSP56602AD 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:16-Bit Digital Signal Processor User manual
DSP56602DS 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:DSP56602 16-Bit Digital Signal Processor Datasheet
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*