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參數(shù)資料
| 型號(hào)： | DSP56600 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | Implementing Viterbi Decoders Using the VSL Instruction on DSP Families |
| 中文描述： | 維特比解碼器實(shí)現(xiàn)上使用DSP的家庭教學(xué)的VSL |
| 文件頁數(shù)： | 57/108頁 |
| 文件大小： | 726K |
| 代理商： | DSP56600 |
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Algorithmic Extensions
Starting from 0: The Pre ACS Macro
Viterbi Decoder Implementation
For More Information On This Product,
Go to: www.freescale.com
4-9
The do loop processes each state update. The branches are added to the state to obtain
the state updates. The second of these adds also loads in the next path metric/path pair
for the next loop iteration. The VSL instructions store the updated path metrics, and the
move loads the next branch metrics.
After the loop, we double n5 (used to vary the number of loop iterations), restore r4 and
r5 to swap path metric read/write addresses, and reinitialize the branch metric pointer
for use by the branch metric update routine.
Example 4-3
Pre-ACS Macro
;*******************************;PreACS***************************************
;
FUNCTION: Update path metrics/paths for the Viterbi algorithm by
;
ACS butterfly from assumed 0 state to start, and double
;
the number of states on each invocation until the full
;
trellis is used. This routine CANNOT be used unless the
;
encoder is starting from an all 0's state. Note this
;
means it cannot be used if the data is a continuation
;
of a previously processed data stream. Use the ACS macro
;
instead. However, for packetised data, or other data that
;
assumes the data starts with the encoder 0 filled, this
;
routine saves cycles, AND only state 0 needs to be initialised
;
before starting the decode.
;
INPUTS:
;
r2 should point to the beginning of the branch metric table
;
r5 should point to the latest path metric for state 0
;
r4 should point to the storage location for updated state 0
;
n5 should be the number of input states/2 to process
;
n5 is doubled each time this macro is invoked
;
OUTPUTS:
;
Updated path metrics/paths stored in XY memory
;
REGISTERS USED:
;
a,b,y01,r2,r3,n3,r4,r5,n5 r2 unchanged (modulo req'd)
;
Registers:
;
r5, pointer to the path metric/path table, arranged as
;
x: path metric, y: path,states ordered assuming
;
bits shift right to left.
;
r4, pointer to the output path metric/path table
;
r0, pointer to the branch metric table, arranged
;
as x:C, y:D, CD,CD,CD, etc.
;
;
SA------NSA
;
\ C
;
D \
;
\
;
\
;
\
;
\
;
SB NSB
;
F
Freescale Semiconductor, Inc.
n
.
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