參數(shù)資料
型號: DSPB56362AG120
廠商: Freescale Semiconductor
文件頁數(shù): 62/152頁
文件大?。?/td> 0K
描述: IC DSP 24BIT AUD 120MHZ 144-LQFP
標(biāo)準(zhǔn)包裝: 60
系列: DSP56K/Symphony
類型: 音頻處理器
接口: 主機(jī)接口,I²C,SAI,SPI
時鐘速率: 120MHz
非易失內(nèi)存: ROM(126 kB)
芯片上RAM: 42kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 3.30V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
包裝: 托盤
Host Interface (HDI08)
DSP56362 Technical Data, Rev. 4
Freescale Semiconductor
2-11
HA2
HA9
PB10
Input
Input, Output, or
Disconnected
GPIO Disconnected Host Address Input 2—When the HDI08 is programmed to
interface a non-multiplexed host bus and the HI function is
selected, this signal is line 2 of the host address (HA2) input bus.
Host Address 9—When HDI08 is programmed to interface a
multiplexed host bus and the HI function is selected, this signal
is line 9 of the host address (HA9) input bus.
Port B 10—When the HDI08 is configured as GPIO, this signal
is individually programmed as input, output, or internally
disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
HRW
HRD/HRD
PB11
Input
Input, Output, or
Disconnected
GPIO Disconnected Host Read/Write—When HDI08 is programmed to interface a
single-data-strobe host bus and the HI function is selected, this
signal is the Host Read/Write (HRW) input.
Host Read Data—When HDI08 is programmed to interface a
double-data-strobe host bus and the HI function is selected, this
signal is the host read data strobe (HRD) Schmitt-trigger input.
The polarity of the data strobe is programmable, but is configured
as active-low (HRD) after reset.
Port B 11—When the HDI08 is configured as GPIO, this signal
is individually programmed as input, output, or internally
disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
HDS/HDS
HWR/HWR
PB12
Input
Input, Output, or
Disconnected
GPIO Disconnected Host Data Strobe—When HDI08 is programmed to interface a
single-data-strobe host bus and the HI function is selected, this
signal is the host data strobe (HDS) Schmitt-trigger input. The
polarity of the data strobe is programmable, but is configured as
active-low (HDS) following reset.
Host Write Data—When HDI08 is programmed to interface a
double-data-strobe host bus and the HI function is selected, this
signal is the host write data strobe (HWR) Schmitt-trigger input.
The polarity of the data strobe is programmable, but is configured
as active-low (HWR) following reset.
Port B 12—When the HDI08 is configured as GPIO, this signal
is individually programmed as input, output, or internally
disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
Table 2-9 Host Interface (continued)
Signal Name
Type
State during Reset
Signal Description
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