259
SAM4CP [DATASHEET]
43051E–ATPL–08/14
13.7.3 Serial Wire/JTAG Debug Port (SWJ-DP)
The Cortex-M4 embeds a SWJ-DP Debug port which is the standard CoreSight debug port. It combines Serial Wire
Debug Port (SW-DP), from 2 to 3 pins and JTAG debug Port (JTAG-DP), 5 pins.
By default, the JTAG Debug Port is active. If the host debugger wants to switch to the Serial Wire Debug Port, it must
provide a dedicated JTAG sequence on TMS/SWDIO and TCK/SWCLK which disables JTAG-DP and enables SW-DP.
When the Serial Wire Debug Port is active, TDO/TRACESWO can be used for trace. The asynchronous TRACE output
(TRACESWO) is multiplexed with TDO. So the asynchronous trace can only be used with SW-DP, not JTAG-DP.
SW-DP or JTAG-DP mode is selected when JTAGSEL is low. It is not possible to switch directly between SWJ-DP and
JTAG boundary scan operations. A chip reset must be performed after JTAGSEL is changed.
13.7.3.1 SW-DP and JTAG-DP Selection Mechanism
Debug port selection mechanism is done by sending specific
SWDIOTMS
sequence. The JTAG-DP is selected by
default after reset.
Switch from JTAG-DP to SW-DP. The sequence is:
Send more than 50
SWCLKTCK
cycles with
SWDIOTMS
= 1
Send the 16-bit sequence on
SWDIOTMS
= 0111100111100111 (0x79E7 MSB first)
Send more than 50
SWCLKTCK
cycles with
SWDIOTMS
= 1
Switch from SWD to JTAG. The sequence is:
Send more than 50
SWCLKTCK
cycles with
SWDIOTMS
= 1
Send the 16-bit sequence on
SWDIOTMS
= 0011110011100111 (0x3CE7 MSB first)
Send more than 50
SWCLKTCK
cycles with
SWDIOTMS
= 1
13.7.4 FPB (Flash Patch Breakpoint)
The FPB:
Implements hardware breakpoints.
Patches code and data from code space to system space.
The FPB unit contains:
Two literal comparators for matching against literal loads from Code space, and remapping to a corresponding
area in System space.
Six instruction comparators for matching against instruction fetches from Code space and remapping to a
corresponding area in System space.
Alternatively, comparators can also be configured to generate a Breakpoint instruction to the processor core on a
match.
Table 13-2.
SWJ-DP Pin List
Pin Name
JTAG Port
Serial Wire Debug Port
TMS/SWDIO
TMS
SWDIO
TCK/SWCLK
TCK
SWCLK
TDI
TDI
-
TDO/TRACESWO
TDO
TRACESWO (optional: trace)