884
SAM4CP [DATASHEET]
43051E–ATPL–08/14
39.6.9 User Buffer Organization
The pixels to be displayed are written into SLCDC_LMEMRx and SLCDC_MMEMRx registers. There are up to two 32-bit
registers for each common terminal.
Table 39-6
provides the address mapping of all commons/segments to be
displayed.
If the segment map registers (SLCDC_SMR0/1) are cleared and the number of segments to handle (SEGSEL field in
SLCDC_MR) is lower or equal to 32, the registers SLCDC_MMEMRx are not required to be programmed and can be left
cleared (default value).
In case segments are remapped, the SLCDC_MMEMRx registers are not required to be programmed if SLCDC_SMR1
register is cleared (i.e. no segment remapped on SEG32 to SEG49 I/O pins). In this case SLCDC_MMEMRx registers
must be cleared.
In the same way if all segments are remapped on the upper part of the SEG terminals (SEG32 to SEG49)
there is no
need to program SLCDC_LMEMRx registers (they must be cleared).
When segment remap is used (SLCDC_SMR0/1 registers differ from 0), the unmapped segments must be kept cleared
to limit internal signal switching.
39.6.10 Segments Mapping Function
By default the segments pins (SEG0:49
)
are automatically assigned according to the SEGSEL configuration in the
SLCDC_MR. The unused SEG I/O pins are forced to be driven by a digital peripheral or can be used as I/O through the
PIO controller.
The automatic assignment is performed if the segment mapping function is not used (SLCDC_SMR0/1 registers are
cleared). The following table provides such assignments.
Table 39-6.
Commons/segments Address Mapping
SEG0
--
SEG31
SEG32
--
SEG49
Memory address
SLCDC_MMEMR5
SLCDC_LMEMR5
COM5
COM5
X
--
X
X
--
X
0x22C
0x228
SLCDC_MMEMR4
SLCDC_LMEMR4
COM4
COM4
X
--
X
X
--
X
0x224
0x220
SLCDC_MMEMR3
SLCDC_LMEMR3
COM3
COM3
X
--
X
X
--
X
0x21C
0x218
SLCDC_MMEMR2
SLCDC_LMEMR2
COM2
COM2
X
--
X
X
--
X
0x214
0x210
SLCDC_MMEMR1
SLCDC_LMEMR1
COM1
COM1
X
--
X
X
--
X
0x20C
0x208
SLCDC_MMEMR0
SLCDC_LMEMR0
COM0
COM0
X
--
X
X
--
X
0x204
0x200
SEGSEL
I/O Port in Use as Segment Driver
I/O Port Pin if SLCDC_SMR0/1=0
0
SEG0
SEG1:49
1
SEG0:1
SEG2:49
...
...
...
48
SEG0:48
SEG49
49
SEG0:49
None