329
SAM4CP [DATASHEET]
43051E–ATPL–08/14
20.4.6 Supply Monitor
The Supply Controller embeds a supply monitor located in the VDDBU_SW Power domain and which monitors VDDIO
power supply.
The supply monitor can be used to prevent the processor from falling into an unpredictable state if the main power supply
drops below a certain level.
The threshold of the supply monitor is programmable. It can be selected from 1.9V to 3.4V by steps of 100 mV. This
threshold is programmed in the SMTH field of the Supply Controller Supply Monitor Mode register (SUPC_SMMR).
The supply monitor can also be enabled during one slow clock period on every one of either 32, 256 or 2048 slow clock
periods, depending on what the user selects. This can be configured by programming the SMSMPL field in
SUPC_SMMR.
Enabling the supply monitor for such reduced times divides the typical supply monitor power consumption by factors of
32, 256 or 2048,respectively, if the user does not need a continuous monitoring of the VDDIO power supply.
A supply monitor detection can either generate a system reset (vddcore_nreset signal is asserted) or a system wake-up.
Generating a system reset when a supply monitor detection occurs is enabled by writing the SMRSTEN bit to 1 in
SUPC_SMMR.
Waking up the system when a supply monitor detection occurs can be enabled by writing the SMEN bit to 1 in the Supply
Controller Wake-up Mode register (SUPC_WUMR).
The Supply Controller provides two status bits in the Supply Controller Status register for the supply monitor which
determines whether the last wake-up was due to the supply monitor:
The SMOS bit provides real-time information, updated at each measurement cycle or updated at each Slow Clock
cycle, if the measurement is continuous.
The SMS bit provides saved information and shows a supply monitor detection has occurred since the last read of
SUPC_SR.
The SMS bit can generate an interrupt if the SMIEN bit is set to 1 in SUPC_SMMR.
Figure 20-2.
Supply Monitor Status Bit and Associated Interrupt
Supply Monitor ON
3.3 V
0 V
Threshold
SMS and SUPC interrupt
Read SUPC_SR
Periodic Sampling
Continuous Sampling (SMSMPL = 1)