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參數(shù)資料
| 型號(hào)： | Embedded Pentium 233 |
| 廠商： | Intel Corp. |
| 英文描述： | 32 BIT Embedded Pentium Processor with MMX Technology(32位嵌入式帶MMX技術(shù)奔騰處理器) |
| 中文描述： | 32位嵌入式MMX技術(shù)（32位嵌入式帶MMX公司的技術(shù)奔騰處理器Pentium處理器） |
| 文件頁數(shù)： | 10/46頁 |
| 文件大小： | 944K |
| 代理商： | EMBEDDED PENTIUM 233 |
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Pentium
Processor with MMX Technology
10
Datasheet
The decode unit decodes the prefetched instructions so the processor can execute the instruction.
The control ROM contains microcode to control the sequence of operations that must be performed
to implement the Pentium processor architecture. The control ROM unit has direct control over
both pipelines.
Pentium processors contain a pipelined floating-point unit that provides a significant floating-point
performance advantage over previous generations of processors.
Symmetric dual processing in a system is supported with two Pentium processors. The two
processors appear to the system as a single Pentium processor. Operating systems with dual
processing support properly schedule computing tasks between the two processors. This
scheduling of tasks is transparent to software applications and the end-user. Logic built into the
processors support a “glueless” interface for easy system design. Through a private bus, the two
Pentium processors arbitrate for the external bus and maintain cache coherency. Dual processing is
supported in a system only if both processors are operating at identical core and bus frequencies.
In this document, in order to distinguish between two Pentium processors in dual processing mode,
one processor is the “Primary” processor and the other is the “Dual” processor.
The Pentium processor supports clock control. When the clock to the processor is stopped, power
dissipation is virtually eliminated. The combination of these improvements makes the Pentium
processor a good choice for energy-efficient designs.
The Pentium processor supports fractional bus operation. This allows the internal processor core to
operate at high frequencies, while communicating with the external bus at lower frequencies.
The Pentium processor contains an on-chip Advanced Programmable Interrupt Controller (APIC).
This APIC implementation supports multiprocessor interrupt management (with symmetric
interrupt distribution across all processors), multiple I/O subsystem support, 8259A compatibility,
and inter-processor interrupt support.
The architectural features introduced in this chapter are more fully described in the
Embedded
Pentium
Processor Family Developer’s Manual
(order number 273204).
1.2
Embedded Pentium
Processor with MMX Technology
The embedded Pentium processor with MMX technology is software and pin compatible with
other members of the embedded Pentium processor family. It contains 4.5 million transistors and is
manufactured on lntel’s enhanced 0.35 micron CMOS process which allows voltage reduction
technology for low power and high density. This enables the embedded Pentium processor with
MMX technology to remain within the thermal envelope of the embedded Pentium processor while
providing a significant performance increase.
The Pentium processor with MMX technology has several additional micro-architectural
enhancements compared to the Pentium processor. The additions are described in the following
sections.
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| Embedded Pentium 200 | 32 Bit Embedded Pentium Processor with MMX Technology(32位嵌入式帶MMX技術(shù)奔騰處理器) |
| Embedded Pentium 266 | Low-Power Embedded Pentium Processor with MMX Technology(低能量嵌入式帶MMX技術(shù)奔騰處理器) |
| EMBMOD133 | Intel Embedded Processor Module(英特爾嵌入式微處理器模塊) |
| EMBMOD166 | Intel Embedded Processor Module() |
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