參數(shù)資料
型號(hào)： EPCS64SI16N
廠商： Altera
文件頁(yè)數(shù)： 37/40頁(yè)
文件大?。?/td> 0K
描述： IC CONFIG DEVICE 64MBIT 16-SOIC
產(chǎn)品培訓(xùn)模塊： Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝： 49
系列： EPCS
可編程類型： 系統(tǒng)內(nèi)可編程
存儲(chǔ)容量： 64Mb
電源電壓： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
封裝/外殼： 16-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 16-SOIC
包裝： 管件
產(chǎn)品目錄頁(yè)面： 604 (CN2011-ZH PDF)
其它名稱： 544-1380-5
EPCS64SI16
EPCS64SI16N-ND
Page 6
Active Serial FPGA Configuration
Serial Configuration (EPCS) Devices Datasheet
January 2014
Altera Corporation
You can configure multiple devices with a single EPCS device. However, you cannot
cascade EPCS devices. To ensure that the programming file size of the cascaded
FPGAs does not exceed the capacity of an EPCS device, refer to Table 1 on page 1.
Figure 4 shows the AS configuration scheme with multiple FPGAs in the chain. The
first FPGA is the configuration master and its MSEL[] pins are set to AS mode. The
following FPGAs are configuration slave devices and their MSEL[] pins are set to PS
mode.
Figure 4. Multiple Devices in AS Mode (1), (5)
Notes to Figure 4:
(1) For more information about the VCC value, refer to the configuration chapter in the appropriate device handbook.
(2) EPCS devices cannot be cascaded.
(3) Connect the MSEL[] input pins to select the AS configuration mode. For more information, refer to the configuration chapter in the appropriate
device handbook.
(4) Connect the MSEL[] input pins to select the PS configuration mode. For more information, refer to the configuration chapter in the appropriate
device handbook.
(5) For more information about configuration pin I/O requirements in an AS configuration scheme for an Altera FPGA, refer to the configuration
chapter in the appropriate device handbook.
DATA
DCLK
nCS
ASDI
DATA0
DCLK
nCSO
nCE
nCONFIG
nSTATUS
MSEL[ ]
nCEO
CONF_DONE
ASDO
VCC (1)
10 k
Ω
VCC (1)
10 k
Ω
VCC (1)
10 k
Ω
(3)
Altera FPGA (Master)
DATA0
DCLK
nCE
nCONFIG
nSTATUS
MSEL[ ]
nCEO
CONF_DONE
(4)
Altera FPGA (Slave)
EPCS Device (2)
N.C.
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