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參數(shù)資料
| 型號： | ET80960JT10016 |
| 廠商： | Intel |
| 文件頁數(shù)： | 5/86頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU I960JT 3V 100MHZ 132-QFP |
| 標準包裝： | 1 |
| 處理器類型： | i960 |
| 特點： | 后綴 JT，32 位 16K 高速緩沖 |
| 速度： | 100MHz |
| 電壓： | 3V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 132-QFP |
| 供應(yīng)商設(shè)備封裝： | 132-QFP |
| 包裝： | 托盤 |
| 其它名稱： | 864017 |
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80960JA/JF/JD/JS/JC/JT 3.3 V Embedded 32-Bit Microprocessor
Datasheet
13
The 80960Jx provides testability features compatible with IEEE Standard Test Access Port and
Boundary Scan Architecture (IEEE Std. 1149.1).
One of the boundary scan instructions, HIGHZ, forces the processor to float all its output pins
(ONCE mode). ONCE mode may also be initiated at reset without using the boundary scan
mechanism.
ONCE mode is useful for board-level testing. This feature allows a mounted 80960Jx to
electrically “remove” itself from a circuit board. This allows for system-level testing in which a
remote tester, such as an in-circuit emulator, may exercise the processor system.
The provided test logic does not interfere with component or circuit board behavior and ensures
that components function correctly, connections between various components are correct, and
various components interact correctly on the printed circuit board.
The JTAG Boundary Scan feature is an attractive alternative to conventional “bed-of-nails” testing.
It may examine connections that might otherwise be inaccessible to a test system.
2.9
Memory-Mapped Control Registers
The 80960Jx, although compliant with the i960 processor core, has the added advantage of
memory-mapped, internal control registers not found on the i960 Kx, Sx or Cx processors. These
registers give software the interface to easily read and modify internal control registers.
Each of these registers is accessed as a memory-mapped, 32-bit register. Access is accomplished
through regular memory-format instructions. The processor ensures that these accesses do not
generate external bus cycles.
2.10
Data Types and Memory Addressing Modes
As with all i960 processors, the 80960Jx instruction set supports several data types and formats:
Bit
Bit fields
Integer (8-, 16-, 32-, 64-bit)
Ordinal (8-, 16-, 32-, 64-bit unsigned integers)
Triple word (96 bits)
Quad word (128 bits)
The 80960Jx provides a full set of addressing modes for C and assembly programming:
Two Absolute modes
Five Register Indirect modes
Index with displacement
IP with displacement
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