參數(shù)資料
型號(hào): ET80960JT10016
廠商: Intel
文件頁數(shù): 9/86頁
文件大?。?/td> 0K
描述: IC MPU I960JT 3V 100MHZ 132-QFP
標(biāo)準(zhǔn)包裝: 1
處理器類型: i960
特點(diǎn): 后綴 JT,32 位 16K 高速緩沖
速度: 100MHz
電壓: 3V
安裝類型: 表面貼裝
封裝/外殼: 132-QFP
供應(yīng)商設(shè)備封裝: 132-QFP
包裝: 托盤
其它名稱: 864017
80960JA/JF/JD/JS/JC/JT 3.3 V Embedded 32-Bit Microprocessor
Datasheet
17
Table 7.
Pin Description Nomenclature
Symbol
Description
I
Input pin only.
O
Output pin only.
I/O
Pin may be either an input or output.
Pin must be connected as described.
S
Synchronous. Inputs must meet setup and hold times relative to CLKIN for proper operation.
S(E) Edge sensitive input
S(L) Level sensitive input
A (...)
Asynchronous. Inputs may be asynchronous relative to CLKIN.
A(E) Edge sensitive input
A(L) Level sensitive input
R (...)
While the processor’s RESET# pin is asserted, the pin:
R(1) is driven to VCC
R(0) is driven to VSS
R(Q) is a valid output
R(X) is driven to unknown state
R(H) is pulled up to VCC
H (...)
While the processor is in the hold state, the pin:
H(1) is driven to VCC
H(0) is driven to VSS
H(Q) Maintains previous state or continues to be a valid output
H(Z) Floats
P (...)
While the processor is halted, the pin:
P(1) is driven to VCC
P(0) is driven to VSS
P(Q) Maintains previous state or continues to be a valid output
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