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| 型號(hào)： | GT-48207 |
| 廠商： | Galileo Technology Services, LLC |
| 英文描述： | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高級(jí)交換式 10+10/100 BaseX以太網(wǎng)控制器) |
| 中文描述： | 先進(jìn)的交換式以太網(wǎng)控制器的10 10/100 BaseX（高級(jí)交換式10 10/100 BaseX以太網(wǎng)控制器） |
| 文件頁(yè)數(shù)： | 45/135頁(yè) |
| 文件大?。?/td> | 1619K |
| 代理商： | GT-48207 |
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GT-482xx Switched Ethernet Controllers for 10+10/100 BaseX
GALI
L
E
O
TECHNOLOGY
CONFI
D
ENTI
AL
--
DO
NOT
REPRODUCE
Revision 1.2
17
MDC
O
Management Data Clock: Provides the timing reference for the transfer of
the MDIO signal. This output may be connected to the PHY devices of both
ports.
MDIO
I/O
Management Data Input/Output: This bidirectional line is used to transfer
control information and status between the PHY and the GT-482xx. It con-
forms with IEEE Std 802.3. This signal may be connected to the PHY
devices of both ports. When not driven by an MII compliant PHY, this pin
must be connected to a pull-up or pull-down resistor. PHY register reads per-
formed by the GT-482XX will be decoded as all 1's or all 0's respectively."
LED Interface Pins
LEDStb/LEDMode
I/O
LED Strobe/LED Mode: Multiplexed LED Strobe and LED mode. In normal
operation, envelopes the full-duplex and Link-status data stream (bit #0 to
bit#27) of a valid data frame on LEDData output. During reset, indicates the
LED mode.
LEDClk
O
LED Clock: 1 MHz clock. This output is used to clock the LEDStb and LED-
Data outputs. During RESET, LEDClk output is tri-stated.
LEDData
O
LED Data: Active LOW. Serial data bit stream which contains the LED indi-
cators per port. The data is shifted out using the LEDClk. LEDStb is used to
mark the first data bit.
Miscellaneous Interface Pins
EnDev*
I
Enable Device: This pin together with EnDev bit in the Global Control regis-
ter activate the ports as follows:
Note: EnDev* is not synchronous to any clock
Scan*
I
Scan: This pin together with TriState* indicate the GT-482xx mode of opera-
tion as follows:
Factory test modes are Reserved and are not to be used in system. Failure
to observe this restriction could result in damage to the device.
Table 2:
Pin Functions (Continued)
S ymbol
Ty pe
D escr ip t ion
E n D ev*
E n D ev bit
M ode
0
x
Enable
1
0
Disable (default)
1
Enable
S can*
Tr i S tat e*
M ode
1
Normal operation
0
1
Factory test mode (Reserved)
1
0
The GT-482xx drives all outputs and
I/O pins to high impedance.
0
Factory test mode (Reserved)
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