參數(shù)資料
型號(hào)： HY5PS12823F
英文描述： 64Mx8|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
中文描述： 64Mx8 | 1.8 | 8K的| D43/D44/D54/D55 |的DDR II內(nèi)存- 512M
文件頁(yè)數(shù)： 40/66頁(yè)
文件大小： 862K
代理商： HY5PS12823F
Rev. 0.52/Nov. 02 40
HY5PS12423(L)F
HY5PS12823(L)F
HY5PS121623(L)F
Posted CAS Opeation
DDR-II SDRAM has new feature, Posted CAS. It is intended for improvement of command bus efficiency. Posted CAS
operation make command and data bus efficient for sustainable bandwidths in DDR-II SDRAM. In Posted CAS opera-
tion, read or write command could be issued immediately after the bank activate command (or any time during the
tRCD period) without tRCD delay.
In side of DRAM, read or Write - CAS command is held for the time of the Additive Latency (AL) before it is issued.
Additive latency is programmed to EMRS and it determine internal command hold time. Therefore, if read or write
command are issued earlier than minimum tRCD delay, proper addtive latency value must be chosen to insure and that
value must be programmed to EMRS. In case of AL=0, operation is the same with normal SDRAM and DDR SDRAM.
Due to the nature of posted CAS operation, DDR-II define RL (read latency) and WL (write latency). RL is determined
by sum of additive latency and CAS latency. WL is defined as RL-1. To utilize this feature, proper additive latency value
(greater than 0) must be programmed to EMRS.
/CK
CK
Active
Q0 Q1 Q2 Q3
D0 D1 D2 D3
Read
tRCD
CAS latency = 3clks
Active
Q0 Q1 Q2 Q3
Read
Read latency = 4clks
Additive Latency = 1clks
Active
Bank A
Q0 Q1 Q2 Q3
Read
Bank A
Read latency = 5clks
Additive Latency = 2clks
CMD
DQS
DQ
CMD
DQS
DQ
CMD
DQS
DQ
Write
Bank A
Write latency= 2clks
D0 D1 D2 D3
D0 D1 D2 D3
Write
Bank A
Write latency = 3clks
Write
Bank A
Write latency = 4clks
AL=0clks, RL=3clks, WL=2clks
AL=1clk, RL=4clks, WL=3clks
AL=2clks, RL=5clks, WL=4clks
tRCD=3CLKs, CL=3CLKs
相關(guān)PDF資料
PDF描述
HY5PS12823LF 64Mx8|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HY5PS12823LF 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64Mx8|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
HY5PS1G1631AFP 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1Gb DDR2 SDRAM
HY5PS1G1631AFP-Y5 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1Gb DDR2 SDRAM
HY5PS1G1631ALFP 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1Gb DDR2 SDRAM
HY5PS1G1631ALFP-Y5 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1Gb DDR2 SDRAM
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