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參數(shù)資料
| 型號(hào)： | ID8259A |
| 廠商： | Intel Corp. |
| 英文描述： | PROGRAMMABLE INTERRUPT CONTROLLER |
| 中文描述： | 可編程中斷控制器 |
| 文件頁數(shù)： | 1/24頁 |
| 文件大?。?/td> | 325K |
| 代理商： | ID8259A |
December 1988
Order Number: 231468-003
8259A
PROGRAMMABLE INTERRUPT CONTROLLER
(8259A/8259A-2)
Y
8086, 8088 Compatible
Y
MCS-80, MCS-85 Compatible
Y
Eight-Level Priority Controller
Y
Expandable to 64 Levels
Y
Programmable Interrupt Modes
Y
Individual Request Mask Capability
Y
Single
a
5V Supply (No Clocks)
Y
Available in 28-Pin DIP and 28-Lead
PLCC Package
(See Packaging Spec., Order
Y
231369)
Y
Available in EXPRESS
D Standard Temperature Range
D Extended Temperature Range
The Intel 8259A Programmable Interrupt Controller handles up to eight vectored priority interrupts for the CPU.
It is cascadable for up to 64 vectored priority interrupts without additional circuitry. It is packaged in a 28-pin
DIP, uses NMOS technology and requires a single
a
5V supply. Circuitry is static, requiring no clock input.
The 8259A is designed to minimize the software and real time overhead in handling multi-level priority inter-
rupts. It has several modes, permitting optimization for a variety of system requirements.
The 8259A is fully upward compatible with the Intel 8259. Software originally written for the 8259 will operate
the 8259A in all 8259 equivalent modes (MCS-80/85, Non-Buffered, Edge Triggered).
231468–1
Figure 1. Block Diagram
DIP
231468–2
PLCC
231468–31
Figure 2. Pin
Configurations
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