參數(shù)資料
型號(hào)： INTELDX4
廠商： Intel Corp.
英文描述： Embedded Write-Back Enhanced Processor(32位回復(fù)嵌入式增強(qiáng)型處理器)
中文描述： 嵌入式回寫增強(qiáng)型處理器（32位回復(fù)嵌入式增強(qiáng)型處理器）
文件頁(yè)數(shù)： 20/50頁(yè)
文件大小： 534K
代理商： INTELDX4
Embedded Write-Back Enhanced IntelDX4 Processor
16
3.2
Pin Quick Reference
The following is a brief pin description. For detailed signal descriptions refer to Appendix A, “Signal Descrip-
tions,” in the Embedded Intel486 Processor Family Developer’s Manual,
order No. 273021.
Table 8.
Embedded Write-Back Enhanced IntelDX4 Processor Pin Descriptions
(Sheet 1 of 8)
Symbol
CLK
Type
I
Name and Function
Clock
provides the fundamental timing and internal operating frequency for the
Embedded Write-Back Enhanced IntelDX4 processor. All external timing
parameters are specified with respect to the rising edge of CLK.
ADDRESS BUS
A31-A4
A3–A2
I/O
O
Address Lines
A31–A2, together with the byte enable signals, BE3#–BE0#,
define the physical area of memory or input/output space accessed. Address lines
A31–A4 are used to drive addresses into the Embedded Write-Back Enhanced
IntelDX4 processor to perform cache line invalidation. Input signals must meet
setup and hold times t
22
and t
23
. A31–A2 are not driven during bus or address
hold.
Byte Enable
signals indicate active bytes during read and write cycles. During the
first cycle of a cache fill, the external system should assume that all byte enables
are active. BE3#–BE0# are active LOW and are not driven during bus hold.
BE3# applies to D31–D24
BE2# applies to D23–D16
BE1# applies to D15–D8
BE0# applies to D7–D0
BE3#
BE2#
BE1#
BE0#
O
O
O
O
DATA BUS
D31–D0
I/O
Data Lines.
D7–D0 define the least significant byte of the data bus; D31–D24
define the most significant byte of the data bus. These signals must meet setup
and hold times t
and t
for proper operation on reads. These pins are driven
during the second and subsequent clocks of write cycles.
DATA PARITY
DP3–DP0
I/O
There is one
Data Parity
pin for each byte of the data bus. Data parity is generated
on all write data cycles with the same timing as the data driven by the Embedded
Write-Back Enhanced IntelDX4 processor. Even parity information must be driven
back into the processor on the data parity pins with the same timing as read
information to ensure that the correct parity check status is indicated by the
Embedded Write-Back Enhanced IntelDX4 processor. The signals read on these
pins do not affect program execution.
Input signals must meet setup and hold times t
and t
. DP3–DP0 must be
connected to V
through a pull-up resistor in systems that do not use parity.
DP3–DP0 are active HIGH and are driven during the second and subsequent
clocks of write cycles.
Parity Status
is driven on the PCHK# pin the clock after ready for read operations.
The parity status is for data sampled at the end of the previous clock. A parity error
is indicated by PCHK# being LOW. Parity status is only checked for enabled bytes
as indicated by the byte enable and bus size signals. PCHK# is valid only in the
clock immediately after read data is returned to the processor. At all other times
PCHK# is inactive (HIGH). PCHK# is never floated.
PCHK#
O
相關(guān)PDF資料
PDF描述
IPS54511 FULLY PROTECTED HIGH SIDE POWER MOSFET SWITCH
IPS5451 FULLY PROTECTED HIGH SIDE POWER MOSFET SWITCH
IPS5451S FULLY PROTECTED HIGH SIDE POWER MOSFET SWITCH
IPS5751 FULLY PROTECTED HIGH SIDE POWER MOSFET SWITCH
IPS5751S FULLY PROTECTED HIGH SIDE POWER MOSFET SWITCH
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
INTELLIGENT CHARGER + 4AA 制造商:Energizer 功能描述:Bulk
INTELLI-INCH-LR-STARTER K 制造商:ALL MOTION 功能描述:Intelli-Inch Stepper & Controller Starter Kit
INTELLIPANEL 制造商:GJD 功能描述:EXTENSION LEAD 8GANG INTELLIPANEL 制造商:GJD 功能描述:EXTENSION LEAD, 8GANG, INTELLIPANEL
INTELLIPLUG 制造商:GLOBAL COMMUNICATIONS 功能描述:ADAPTOR 3WAY INTELLIPLUG
INTELLIPROBE 100 制造商:Fluke Networks 功能描述:TONE + PROBE KIT
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*