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參數(shù)資料
| 型號(hào)： | INTELDX4 |
| 廠商： | Intel Corp. |
| 英文描述： | Embedded Write-Back Enhanced Processor(32位回復(fù)嵌入式增強(qiáng)型處理器) |
| 中文描述： | 嵌入式回寫增強(qiáng)型處理器（32位回復(fù)嵌入式增強(qiáng)型處理器） |
| 文件頁(yè)數(shù)： | 45/50頁(yè) |
| 文件大?。?/td> | 534K |
| 代理商： | INTELDX4 |
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41
Embedded Write-Back Enhanced IntelDX4 Processor
In a mixed voltage system (processors at 3 volts,
peripherals at 5 volts), the bus is driven to 5 volts by
the peripheral logic. Therefore, the processor must
discharge the capacitance on the bus from 5 volts to
0 volts, which takes more time than the 3 volts to 0
volts transition. Inaccurate capacitive derating
impacts timing margins and may result in system
failures under certain load conditions
.
When designing for higher loads in mixed voltage
systems, timing margins should be evaluated based
on the derating curves shown in Figure 14. For more
accurate delay prediction, use I/O buffer models.
Figure 14. Typical Loading Delay versus Load Capacitance in Mixed Voltage System
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