參數(shù)資料
型號： IS43R16800A1
廠商： Integrated Silicon Solution, Inc.
英文描述： 8Meg x 16 128-MBIT DDR SDRAM
中文描述： 8Meg × 16的128 - Mbit DDR SDRAM內(nèi)存
文件頁數(shù)： 10/72頁
文件大?。?/td> 2174K
代理商： IS43R16800A1
10
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. 00A
04/17/06
ISSI
IS43R16800A1
Extended Mode Register
The Extended Mode Register controls functions beyond those controlled by the Mode Register; these additional functions
include DLL enable/disable, bit A0; output drive strength selection, bit A1; and QFC output enable/disable, bit A2 (NTC
optional). These functions are controlled via the bit settings shown in the Extended Mode Register Definition. The Extended
Mode Register is programmed via the Mode Register Set command (with BA0 = 1 and BA1 = 0) and retains the stored informa-
tion until it is programmed again or the device loses power. The Extended Mode Register must be loaded when all banks are
idle, and the controller must wait the specified time before initiating any subsequent operation. Violating either of these require-
ments result in unspecified operation.
DLL Enable/Disable
The DLL must be enabled for normal operation. DLL enable is required during power up initialization, and upon returning to nor-
mal operation after having disabled the DLL for the purpose of debug or evaluation. The DLL is automatically disabled when
entering self refresh operation and is automatically re-enabled upon exit of self refresh operation. Any time the DLL is enabled,
200 clock cycles must occur to allow time for the internal clock to lock to the externally applied clock before a Read command
can be issued. This is the reason for introducing timing parameter t
XSRD
for DDR SDRAM’s (Exit Self Refresh to Read Com-
mand). Non- Read commands can be issued 2 clocks after the DLL is enabled via the EMRS command (t
MRD
) or 10 clocks after
the DLL is enabled via self refresh exit command (t
XSNR
, Exit Self Refresh to Non-Read Command).
Output Drive Strength
The normal drive strength for all outputs is specified to be SSTL_2, Class II.
QFC Enable/Disable
The QFC signal is an optional DRAM output control used to isolate module loads (DIMMs) from the system memory bus by
means of external FET switches when the given module (DIMM) is not being accessed. The QFC function is an optional feature
for
this device
and is not included on all DDR SDRAM devices.
相關(guān)PDF資料
PDF描述
IS43R16800A1-5TL 8Meg x 16 128-MBIT DDR SDRAM
IS43R32400A 4Meg x 32 128-MBIT DDR SDRAM
IS43R32400A-5B 4Meg x 32 128-MBIT DDR SDRAM
IS43R32400A-5BL 4Meg x 32 128-MBIT DDR SDRAM
IS43R32400A-6B 4Meg x 32 128-MBIT DDR SDRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IS43R16800A1-5TL 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:8Meg x 16 128-MBIT DDR SDRAM
IS43R16800A-5T 功能描述:動態(tài)隨機(jī)存取存儲器 128M 2.5v 8Mx16 400MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
IS43R16800A-5TL 功能描述:動態(tài)隨機(jī)存取存儲器 128M 2.5v 8Mx16 400MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
IS43R16800A-5TL-TR 功能描述:動態(tài)隨機(jī)存取存儲器 128M 2.5v 8Mx16 400MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
IS43R16800A-5T-TR 功能描述:動態(tài)隨機(jī)存取存儲器 128M 2.5v 8Mx16 400MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
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