參數(shù)資料
型號: IS43R16800A1
廠商: Integrated Silicon Solution, Inc.
英文描述: 8Meg x 16 128-MBIT DDR SDRAM
中文描述: 8Meg × 16的128 - Mbit DDR SDRAM內(nèi)存
文件頁數(shù): 57/72頁
文件大?。?/td> 2174K
代理商: IS43R16800A1
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. 00A
04/17/06
57
ISSI
IS43R16800A1
Electrical Characteristics & AC Timing - Absolute
Specifications
Notes
1.
Input slew rate = 1V/ns.
2.
The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross; the
input reference level for signals other than CK/CK is V
REF
.
3.
Inputs are not recognized as valid until V
REF
stabilizes.
4.
The Output timing reference level, as measured at the timing reference point indicated in AC Characteristics
(Note 3) is V
TT
.
5.
t
HZ
and t
LZ
transitions occur in the same access time windows as valid data transitions. These parameters are
not referred to a specific voltage level, but specify when the device is no longer driving (HZ), or begins driving
(LZ).
6.
The maximum limit for this parameter is not a device limit. The device operates with a greater value for this
parameter, but system performance (bus turnaround) degrades accordingly.
7.
The specific requirement is that DQS be valid (high, low, or some point on a valid transition) on or before this
CK edge. A valid transition is defined as monotonic and meeting the input slew rate specifications of the
device. When no writes were previously in progress on the bus, DQS will be transitioning from Hi-Z to logic
LOW. If a previous write was in progress, DQS could be HIGH, LOW, or transitioning from high to low at this
time, depending on t
DQSS
.
8.
A maximum of eight Autorefresh commands can be posted to any given DDR SDRAM device.
9.
For command/address input slew rate
1.0V/ns. Slew rate is measured between V
OH
(AC) and V
OL
(AC).
10. For command/address input slew rate
0.5V/ns and < 1.0V/ns. Slew rate is measured between V
OH
(AC) and
V
OL
(AC).
11. CK/CK slew rates are
1.0V/ns.
12. These parameters guarantee device timing, but they are not necessarily tested on each device, and they may
be guaranteed by design or tester characterization.
13. For each of the terms in parentheses, if not already an integer, round to the next highest integer. t
CK
is equal
to the actual system clock cycle time. For example, for DDR266B at CL = 2.5, t
DAL
= (15ns/7.5ns) +
(20ns/7.5ns) = 2 + 3 = 5.
相關(guān)PDF資料
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IS43R16800A1-5TL 8Meg x 16 128-MBIT DDR SDRAM
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IS43R32400A-5B 4Meg x 32 128-MBIT DDR SDRAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IS43R16800A1-5TL 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:8Meg x 16 128-MBIT DDR SDRAM
IS43R16800A-5T 功能描述:動態(tài)隨機存取存儲器 128M 2.5v 8Mx16 400MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
IS43R16800A-5TL 功能描述:動態(tài)隨機存取存儲器 128M 2.5v 8Mx16 400MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
IS43R16800A-5TL-TR 功能描述:動態(tài)隨機存取存儲器 128M 2.5v 8Mx16 400MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
IS43R16800A-5T-TR 功能描述:動態(tài)隨機存取存儲器 128M 2.5v 8Mx16 400MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube