參數(shù)資料
型號: K7R323682
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 1Mx36 & 2Mx18 & 4Mx9 QDRTM II b2 SRAM
中文描述: 1Mx36
文件頁數(shù): 19/19頁
文件大?。?/td> 201K
代理商: K7R323682
1Mx36 & 2Mx18 & 4Mx9 QDRTM II b2 SRAM
- 9 -
Rev 2.0
Dec. 2003
K7R323682M
K7R321882M
K7R320982M
WRITE TRUTH TABLE(x18)
Notes: 1. X means "Don
′t Care".
2. All inputs in this table must meet setup and hold time around the rising edge of input clock K or K (
↑ ).
3. Assumes a WRITE cycle was initiated.
4. This table illustates operation for x18 devices. x9 device operation is similar except that
BW controls D0:D8.
K
BW0
BW1
OPERATION
L
WRITE ALL BYTEs ( K
↑ )
L
WRITE ALL BYTEs ( K
↑ )
L
H
WRITE BYTE 0 ( K
↑ )
L
H
WRITE BYTE 0 ( K
↑ )
H
L
WRITE BYTE 1 ( K
↑ )
H
L
WRITE BYTE 1 ( K
↑ )
H
WRITE NOTHING ( K
↑ )
H
WRITE NOTHING ( K
↑ )
WRITE TRUTH TABLE(x36)
Notes: 1. X means "Don
′t Care".
2. All inputs in this table must meet setup and hold time around the rising edge of input clock K or K (
↑ ).
3. Assumes a WRITE cycle was initiated.
K
BW0
BW 1
BW2
BW 3
OPERATION
L
WRITE ALL BYTEs ( K
↑ )
L
WRITE ALL BYTEs ( K
↑ )
L
H
WRITE BYTE 0 ( K
↑ )
L
H
WRITE BYTE 0 ( K
↑ )
H
L
H
WRITE BYTE 1 ( K
↑ )
H
L
H
WRITE BYTE 1 ( K
↑ )
H
L
WRITE BYTE 2 and BYTE 3 ( K
↑ )
H
L
WRITE BYTE 2 and BYTE 3 ( K
↑ )
H
WRITE NOTHING ( K
↑ )
H
WRITE NOTHING ( K
↑ )
TRUTH TABLES
SYNCHRONOUS TRUTH TABLE
Notes: 1. X means "Don
′t Care".
2. The rising edge of clock is symbolized by (
↑ ).
3. Before enter into clock stop status, all pending read and write operations will be completed.
K
R
W
D
Q
OPERATION
D(A0)
D(A1)
Q(A0)
Q(A1)
Stopped
X
Previous state
Clock Stop
H
X
High-Z
No Operation
L
X
DOUT at C(t+1)
DOUT at C(t+2)
Read
X
L
Din at K(t)
X
Write
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