Functional Description and Application Information
32 kbyte Flash Module (S12SFTSR32KV1)
MM912F634
Freescale Semiconductor
299
The security as defined in the Flash security byte is not changed by using the backdoor key access sequence to unsecure. The
stored backdoor keys are unaffected by the backdoor key access sequence. After the next reset of the MCU, the security state
of the Flash module is determined by the Flash security byte. The backdoor key access sequence has no effect on the program
and erase protections defined in the Flash protection register (FPROT).
It is not possible to unsecure the MCU in special mode by using the backdoor key access sequence in background debug mode
(BDM).
4.36.6.2
Unsecuring the MCU in Special Mode Using BDM
The MCU can be unsecured in special mode by erasing the Flash module by the following method:
1.
Reset the MCU into special mode, delay while the erase test is performed by the BDM secure ROM.
2.
Send BDM commands to disable protection in the Flash module.
3.
Execute a mass erase command write sequence to erase the Flash memory.
After the CCIF flag sets to indicate that the mass operation has completed, reset the MCU into special mode. The
BDM secure ROM will verify that the Flash memory is erased and will assert the UNSEC bit in the BDM status
register. This BDM action will cause the MCU to override the Flash security state and the MCU will be unsecured.
All BDM commands will be enabled and the Flash security byte may be programmed to the unsecure state by the
following method:
1.
Send BDM commands to execute a program sequence to program the Flash security byte to the unsecured state.
2.
Reset the MCU.
4.36.7
Resets
4.36.7.1
Flash Reset Sequence
On each reset, the Flash module executes a reset sequence to hold CPU activity, while reading the following
resources from the Flash block:
4.36.7.2
Reset While Flash Command Active
If a reset occurs while any Flash command is in progress, that command will be immediately aborted. The state of the Flash array
address being programmed or the sector/block being erased is not guaranteed.
4.36.8
Interrupts
NOTE
Vector addresses and their relative interrupt priority are determined at the MCU level.
The Flash module can generate an interrupt when all Flash command operations have completed, when the Flash address, data
and command buffers are empty.
Table 387. Flash Interrupt Sources
Interrupt Source
Interrupt Flag
Local Enable
Global (CCR) Mask
Flash Address, Data and Command Buffers empty
CBEIF
(FSTAT register)
CBEIE
(FCNFG register)
I Bit
All Flash commands completed
CCIF
(FSTAT register)
CCIE
(FCNFG register)
I Bit