Functional Description and Application Information
Modes of Operation
MM912F634
Freescale Semiconductor
57
For internal reset sources, the RESET_A pin is driven low for tRST after the reset condition is gone. After this delay, the RESET_A
pin is released. With a high detected on the RESET_A pin, VDD>VLVR and VDDX>VLVRX the MM912F634 analog die enters in
Normal mode.
To avoid short-circuit conditions being present for a long time, a tVTO timeout is implemented. Once VDD < VLVR or VDDX < VLVRX
with VS1 > (VLVRI+ VLVR _H) for more than tVTO, the MM912F634 analog die will transit directly to Sleep mode.
The Reset Status Register (RSR) will indicate the source of the reset by individual flags.
POR - Power On Reset
LVR - Low Voltage Reset VDD
LVRX - Low Voltage Reset VDDX
WDR - Watchdog Reset
EXR - External Reset
WUR - Wake-up Sleep Reset
4.3.3
Normal Mode
In Normal mode, all MM912F634 analog die user functions are active and can be controlled by the D2D Interface. Both regulators
(VDD and VDDX) are active and operate with full current capability.
Once entered in Normal mode, the Watchdog will operate as a simple non-window watchdog with an initial timeout (tIWDTO) to
be reset via the D2D Interface. After the initial reset, the watchdog will operate in standard window mode. See
Section 4.9,4.3.4
Stop Mode
NOTE
To avoid any pending analog die interrupts prevent the MCU from entering MCU stop
resulting in unexpected system behavior, the analog die IRQ sources should be disabled
and the corresponding flags be cleared before entering stop.
The Stop mode will allow reduced current consumption with fast startup time. In this mode, both voltage regulators (VDD and
VDDX) are active, with limited current drive capability. In this condition, the MCU is supposed to operate in Low Power mode
(STOP or WAIT).
The device can enter in Stop mode by configuring the Mode Control Register (MCR) via the D2D Interface. The MCU has to enter
a Low Power mode immediately afterwards executing the STOP or WAIT instruction. The Wake-up Source Register (WSR) has
to be read after a wake-up condition in order to execute a new STOP mode command. Two base clock cycles (fBASE) delay are
required between WSR read and MCR write.
While in Stop mode, the MM912F634 analog die will wake up on the following sources:
Lx - Wake-up (maskable with selectable cyclic sense)
Forced Wake-up (configurable timeout)
LIN Wake-up
D2D Wake-up (special command)
After Wake-up from the sources listed above, the device will transit to Normal mode.
Reset will wake up the device directly to Reset mode.