參數(shù)資料
型號(hào): KM44S16030B
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 4M x 4Bit x 4 Banks Synchronous DRAM(4M x 4位 x 4組同步動(dòng)態(tài)RAM)
中文描述: 4米× 4位× 4銀行同步DRAM(4米× 4位× 4組同步動(dòng)態(tài)RAM)的
文件頁(yè)數(shù): 41/43頁(yè)
文件大?。?/td> 625K
代理商: KM44S16030B
TIMING DIAGRAM - III
CMOS SDRAM
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
ó
ELECTRONICS
REV. 2 Mar. '98
Active/Precharge Power Down Mode @CAS Latency=2, Burst Length=4
Precharge
Power-down
Entry
: Don
t Care
*Note :
1. Both banks should be in idle state prior to entering precharge power down mode.
2. CKE should be set high at least 1CLK + tss prior to Row active command.
3. Can not violate minimum refresh specification. (64ms)
*Note 1
Precharge
tSS
*Note 2
BA
DQ
ADDR
CAS
RAS
CS
CKE
CLOCK
WE
DQM
A
10
/AP
tSS
tSS
ó
ó
ó
ó
ó
ó
ó
ó
Ra
ó
ó
Ca
ó
ó
Ra
ó
ó
Qa0
Qa1
Qa2
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
Row Active
Precharge
Power-down
Exit
Active
Power-down
Entry
Active
Power-down
Exit
Read
tSHZ
*Note 3
ó
*Note 2
相關(guān)PDF資料
PDF描述
KM44S16030C 4M x 4Bit x 4 Banks Synchronous DRAM(4M x 4位 x 4組同步動(dòng)態(tài)RAM)
KM44S32030B 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL
KM44S32030 8M x 4Bit x 4 Banks Synchronous DRAM(8M x 4位 x 4組同步動(dòng)態(tài)RAM)
KM44V16104B 16M x 4Bit CMOS Dynamic RAM with Extended Data Out(16M x 4位CMOS 動(dòng)態(tài)RAM(帶擴(kuò)展數(shù)據(jù)輸出))
KM44V16004B 16M x 4Bit CMOS Dynamic RAM with Extended Data Out(16M x 4位CMOS 動(dòng)態(tài)RAM(帶擴(kuò)展數(shù)據(jù)輸出))
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KM44S32030 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M x 4Bit x 4 Banks Synchronous DRAM
KM44S32030B 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL
KM44S32030BT-G/F10 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL
KM44S32030BT-G/F8 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL
KM44S32030BT-G/FA 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL