參數(shù)資料
型號(hào): KM44S4020CT
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 2M x 4Bit x 2 Banks Synchronous DRAM(2M x 4位 x 2組同步動(dòng)態(tài)RAM)
中文描述: 2米x 4位× 2銀行同步DRAM(2米× 4位× 2組同步動(dòng)態(tài)RAM)的
文件頁數(shù): 36/44頁
文件大小: 604K
代理商: KM44S4020CT
TIMING DIAGRAM - I
CMOS SDRAM
ELECTRONICS
REV. 4 Nov. '97
0
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Read & Write Cycle with Auto Precharge I @Burst Length=4
HIGH
Row Active
(A-Bank)
: Don't care
*Note:
¨ When Read(Write) command with auto precharge is issued at A-Bank after A and B Bank activation.
- if Read(Write) command without auto precharge is issued at B-Bank before A Bank auto precharge starts, A Bank
auto precharge will start at B Bank read command input point .
- any command can not be issued at A Bank during tRP after A Bank auto precharge starts.
.
Row Active
(B-Bank)
Read with
Auto Pre
charge
(A-Bank)
Write with
Auto Precharge
(A-Bank)
Row Active
(A-Bank)
BA
A
10
/AP
CL=2
CL=3
DQ
ADDR
CAS
RAS
CS
CKE
CLOCK
WE
DQM
Qa0
Qa1
Qb0
Qb1
Qa0
Qa1
Qb0
Qb1
Ra
Rb
Ca
Ra
Rb
Ra
Cb
Qb2
Qb3
Read without Auto
precharge(B-Bank)
Auto Precharge
Start Point
(A-Bank)*¨
Precharge
(B-Bank)
Ca
Ra
Da0
Da1
Da0
Da1
Qb2
Qb3
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