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參數(shù)資料
| 型號： | KM44S4020CT |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 2M x 4Bit x 2 Banks Synchronous DRAM(2M x 4位 x 2組同步動態(tài)RAM) |
| 中文描述： | 2米x 4位× 2銀行同步DRAM（2米× 4位× 2組同步動態(tài)RAM）的 |
| 文件頁數(shù)： | 4/44頁 |
| 文件大?。?/td> | 604K |
| 代理商： | KM44S4020CT |
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KM44S4020C
REV. 5 Feb. '98
CMOS SDRAM
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Voltage on any pin relative to V
SS
V
IN
, V
OUT
-1.0 ~ 4.6
V
Voltage on V
DD
supply relative to V
SS
V
DD
, V
DDQ
-1.0 ~ 4.6
V
Storage temperature
T
STG
-55 ~ +150
°
C
Power dissipation
P
D
1
W
Short circuit current
I
OS
50
mA
Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Note :
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
= 0 to 70
°
C)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Supply voltage
V
DD
, V
DDQ
3.0
3.3
3.6
V
Input logic high voltage
V
IH
2.0
3.0
V
DDQ
+0.3
V
1
Input logic low voltage
V
IL
-0.3
0
0.8
V
2
Output logic high voltage
V
OH
2.4
-
-
V
I
OH
= -2mA
Output logic low voltage
V
OL
-
-
0.4
V
I
OL
= 2mA
Input leakage current (Inputs)
I
IL
-1
-
1
uA
3
Input leakage current (I/O pins)
I
IL
-1.5
-
1.5
uA
3,4
1. V
IH
(max) = 5.6V AC. The overshoot voltage duration is
≤
3ns.
2. V
IL
(min) = -2.0V AC. The undershoot voltage duration is
≤
3ns.
3. Any input 0V
≤
V
IN
≤
V
DDQ.
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
4. Dout is disabled, 0V
≤
V
OUT
≤
V
DDQ.
Notes :
CAPACITANCE
(V
DD
= 3.3V, T
A
= 23
°
C, f = 1MHz, V
REF
=1.4V
±
200
mV)
Pin
Symbol
Min
Max
Unit
Clock
C
CLK
2.5
4.0
pF
RAS, CAS, WE, CS, CKE, DQM
C
IN
2.5
5.0
pF
Address
C
ADD
2.5
5.0
pF
DQ
0
~ DQ
3
C
OUT
4.0
6.5
pF
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